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公开(公告)号:US12159930B2
公开(公告)日:2024-12-03
申请号:US17897237
申请日:2022-08-29
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC: H01L29/66 , H01L29/16 , H01L29/20 , H01L29/778
Abstract: A high electron mobility transistor (HEMT) includes a substrate, a P-type III-V composition layer, a gate electrode and a carbon containing layer. The P-type III-V composition layer is disposed on the substrate, and the gate electrode is disposed on the P-type III-V composition layer. The carbon containing layer is disposed under the P-type III-V composition layer to function like an out diffusion barrier for preventing from the dopant within the P-type III-V composition layer diffusing into the stacked layers underneath during the annealing process.
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公开(公告)号:US20230020271A1
公开(公告)日:2023-01-19
申请号:US17949241
申请日:2022-09-21
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Hsing Chen , Yu-Ming Hsu , Tsung-Mu Yang , Yu-Ren Wang
IPC: H01L29/778 , H01L21/768 , H01L29/66 , H01L21/67
Abstract: A high-electron mobility transistor includes a substrate; a channel layer on the substrate; a AlGaN layer on the channel layer; and a P—GaN gate on the AlGaN layer. The AlGaN layer comprises a first region and a second region. The first region has a composition that is different from that of the second region.
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公开(公告)号:US11355626B2
公开(公告)日:2022-06-07
申请号:US16574094
申请日:2019-09-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC: H01L29/778 , H01L29/205 , H01L29/267 , H01L29/15 , H01L29/20 , H01L29/04
Abstract: An HEMT includes an aluminum gallium nitride layer. A gallium nitride layer is disposed below the aluminum gallium nitride layer. A zinc oxide layer is disposed under the gallium nitride layer. A source electrode and a drain electrode are disposed on the aluminum gallium nitride layer. A gate electrode is disposed on the aluminum gallium nitride layer and between the drain electrode and the source electrode.
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公开(公告)号:US20190221562A1
公开(公告)日:2019-07-18
申请号:US15880492
申请日:2018-01-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Hsu Ting , Yu-Ying Lin , Yen-Hsing Chen , Chun-Jen Chen , Chun-Wei Yu , Keng-Jen Lin , Yu-Ren Wang
IPC: H01L27/088 , H01L29/06 , H01L21/8234 , H01L29/66
CPC classification number: H01L27/0886 , H01L21/823431 , H01L21/823481 , H01L29/0653 , H01L29/66545
Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure, a cladding layer, and a gate structure. The semiconductor substrate includes fin shaped structures. The isolation structure is disposed between the fin shaped structures. Each of the fin shaped structures includes a first portion disposed above a top surface of the isolation structure and a second portion disposed on the first portion. A width of the second portion is smaller than a width of the first portion. The cladding layer is disposed on the first portion and the second portion of each of the fin shaped structures. The cladding layer includes a curved surface. The gate structure is disposed straddling the fin shaped structures.
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公开(公告)号:US20230268397A1
公开(公告)日:2023-08-24
申请号:US18135206
申请日:2023-04-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC: H01L29/15 , H01L29/778
CPC classification number: H01L29/151 , H01L29/7786
Abstract: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
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公开(公告)号:US11664426B2
公开(公告)日:2023-05-30
申请号:US17685400
申请日:2022-03-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC: H01L29/15 , H01L29/778
CPC classification number: H01L29/151 , H01L29/7786
Abstract: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
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公开(公告)号:US20220320292A1
公开(公告)日:2022-10-06
申请号:US17683288
申请日:2022-02-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Yu-Chi Wang , Yen-Hsing Chen , Tsung-Mu Yang , Yu-Ren Wang
IPC: H01L29/15 , H01L29/778
Abstract: A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride.
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公开(公告)号:US20220093778A1
公开(公告)日:2022-03-24
申请号:US17100935
申请日:2020-11-22
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Hsing Chen , Yu-Ming Hsu , Tsung-Mu Yang , Yu-Ren Wang
IPC: H01L29/778 , H01L29/66 , H01L21/67 , H01L21/768
Abstract: A high-electron mobility transistor includes a substrate; a channel layer on the substrate; a AlGaN layer on the channel layer; and a P—GaN gate on the AlGaN layer. The AlGaN layer comprises a first region and a second region. The first region has a composition that is different from that of the second region.
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公开(公告)号:US10366991B1
公开(公告)日:2019-07-30
申请号:US15880492
申请日:2018-01-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Hsu Ting , Yu-Ying Lin , Yen-Hsing Chen , Chun-Jen Chen , Chun-Wei Yu , Keng-Jen Lin , Yu-Ren Wang
IPC: H01L27/088 , H01L29/66 , H01L21/8234 , H01L29/06
Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure, a cladding layer, and a gate structure. The semiconductor substrate includes fin shaped structures. The isolation structure is disposed between the fin shaped structures. Each of the fin shaped structures includes a first portion disposed above a top surface of the isolation structure and a second portion disposed on the first portion. A width of the second portion is smaller than a width of the first portion. The cladding layer is disposed on the first portion and the second portion of each of the fin shaped structures. The cladding layer includes a curved surface. The gate structure is disposed straddling the fin shaped structures.
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公开(公告)号:US20190221655A1
公开(公告)日:2019-07-18
申请号:US15869087
申请日:2018-01-12
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Hsing Chen , Chun-Yu Chen , Chung-Ting Huang , Zih-Hsuan Huang , Yu-Chien Sung
IPC: H01L29/66 , H01L21/3213 , H01L21/033 , H01L29/78 , H01L27/088 , H01L29/06
CPC classification number: H01L29/66636 , H01L21/033 , H01L21/32139 , H01L27/0886 , H01L29/0653 , H01L29/66545 , H01L29/6656 , H01L29/66795 , H01L29/66818 , H01L29/7848
Abstract: A method for fabricating a semiconductor device is disclosed. A fin is formed on a substrate. The fin protrudes from a trench isolation layer on a substrate. The fin comprises a source region, a drain region and a channel region therebetween. A dummy gate strides across the fin and surrounding the channel region. An upper portion of the fin is removed so as to form a hollow channel underneath the dummy gate. A replacement channel layer is in-situ epitaxially grown in the hollow channel.
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