公开(公告)号：WO2023091983A1

公开(公告)日：2023-05-25

申请号：PCT/US2022/080010

申请日：2022-11-17

Applicant: APPLIED MATERIALS, INC.

Inventor： VAN DEN BROEKE, Douglas Joseph ,  TSAI, Chi-Ming

IPC: G03F7/20

Abstract: A system, methods, and a non-transitory computer-readable medium for digital lithography to reduce mura in substrate sections. The boundary lines of the digital lithography need to be invisible. In one example, a system includes a processing unit configured to print a virtual mask file provided by a controller. The controller is configured to receive data and convert the data into a virtual mask file having an exposure pattern for a lithographic process. The exposure pattern includes a plurality of first sections, and second sections. Each first section forms a boundary with each second section along a first column of image projection systems of the processing unit. The controller patterns the substrate. The exposure pattern includes a first section pattern of each first section that crosses the eye to eye boundary with the second section making the boundary invisible.

公开(公告)号：WO2023091335A1

公开(公告)日：2023-05-25

申请号：PCT/US2022/049272

申请日：2022-11-08

Applicant: APPLIED MATERIALS, INC.

Inventor： HERLE, Subramanya P.

IPC: G01N21/25 ,  G01N27/30

Abstract: Embodiments of the present disclosure generally relate to systems and methods for in-line measurement of alkali metal-containing structures or alkali ion-containing structures of, e.g., electrodes. In an embodiment, a system for processing an electrode is provided. The system includes a first processing chamber for forming an electrode comprising an alkali metal-containing structure. The system further includes a metrology station coupled to and in-line with the first processing chamber, the metrology station comprising: a source of radiation for delivering radiation to the alkali metal-containing structure, and an optical detector for receiving an emission of radiation emitted from the alkali metal-containing structure, and a processor configured to determine a characteristic of the alkali metal-containing structure of the electrode based on the emission of radiation.

公开(公告)号：WO2023091268A1

公开(公告)日：2023-05-25

申请号：PCT/US2022/047473

申请日：2022-10-21

Applicant: APPLIED MATERIALS, INC.

Inventor： DHINDSA, Rajinder ,  COLLINS, Kenneth S. ,  RICE, Michael R. ,  CARDUCCI, James D.

IPC: H01J37/32

Abstract: A plasma treatment chamber comprises one or more sidewalls. A support surface within the one or more sidewalls holds a workpiece. A first gas injector along the one or more sidewalls injects a first gas flow in a first direction generally parallel to and across a surface of the workpiece. A first pump port along the one or more sidewalls generally opposite of the first gas injector pumps out the first gas flow. A second gas injector along the one or more sidewalls injects a second gas flow in a second direction generally parallel to and across the surface of the workpiece. A second pump port along the one or more sidewalls generally opposite of the second gas injector pumps out the second gas flow. Conductance control rings modulate conductance of the pump ports and are located proximate to plasma screens at a top of the pump ports.

公开(公告)号：WO2023091267A1

公开(公告)日：2023-05-25

申请号：PCT/US2022/047350

申请日：2022-10-21

Applicant: APPLIED MATERIALS, INC.

Inventor： BECKER, Klaus ,  AMATO, Luigi G. ,  GOMEZ, Elvis ,  BURGDORF, David ,  THERIAULT, Victor ,  STEWART, Thomas

IPC: H01J27/02 ,  H01J37/08 ,  H01J37/317

Abstract: A Bernas ion source having a shield is disclosed. The shield is disposed between the distal portion of the filament and the first end of the chamber and serves to confine the plasma to the region between the shield and the second end of the chamber. The shield may be electrically connected to the negative leg of the filament so as to be the most negatively biased component in the chamber. In other embodiments, the shield may be electrically floating. In this embodiment, the shield may self-bias. The shield is typically made of a refractory metal. The use of the shield may reduce back heating of the filament by the plasma and reduce the possibility for thermal runaway. This may allow denser plasmas to be generated within the chamber.

公开(公告)号：WO2023086262A1

公开(公告)日：2023-05-19

申请号：PCT/US2022/048823

申请日：2022-11-03

Applicant: APPLIED MATERIALS, INC.

Inventor： ACHKASOV, Kostiantyn ,  REIMER, Peter ,  LE, Shawn, Thanhson ,  ZOKAEI, Sohrab

IPC: H01L21/66 ,  H01L21/67

Abstract: Exemplary diagnostic wafers for a semiconductor processing chamber may include a wafer body defining a plurality of recesses. The diagnostic wafers may include at least one data logging puck positionable within one of the plurality of recesses. The diagnostic wafers may include at least one battery puck positionable within one of the plurality of recesses. The diagnostic wafers may include at least one sensor puck positionable within one of the plurality of recesses.

公开(公告)号：WO2023081169A1

公开(公告)日：2023-05-11

申请号：PCT/US2022/048630

申请日：2022-11-01

Applicant: APPLIED MATERIALS, INC.

Inventor： PACK, Robert C.

IPC: H01L21/67 ,  H01L21/66 ,  H01L21/033 ,  G05B13/04 ,  G05B19/418

Abstract: An electronic device manufacturing system configured to performing, by manufacturing equipment, a first process on a first substrate according to a process recipe, wherein the process recipe comprises a plurality of setting parameters. The system then generates metrology data associated with a plurality of features and inputs the metrology data into one or more Bayesian probabilistic models. The system then receives an output from the one or more Bayesian probabilistic models based on the metrology data and at least one settings parameter of the plurality of setting parameters. The system then updates, based on the output of the one or more Bayesian probabilistic models, the process recipe by modifying at least one setting parameter of the plurality of setting parameters, and performs, by the manufacturing equipment, a second process on a second substrate according to the updated process recipe.

公开(公告)号：WO2023080953A1

公开(公告)日：2023-05-11

申请号：PCT/US2022/043184

申请日：2022-09-12

Applicant: APPLIED MATERIALS, INC.

Inventor： KANG, Chang Seok ,  LEE, Gill Yong ,  FISHBURN, Fred ,  KITAJIMA, Tomohiko ,  KANG, Sung-Kwan ,  VARGHESE, Sony

IPC: H01L27/11521 ,  H01L27/11548 ,  H01L27/11568 ,  H01L27/11575 ,  H01L27/108

Abstract: A semiconductor manufacturing process for forming a three-dimensional (3D) memory structure and a semiconductor device having a 3D memory structure is described. The 3D memory structure comprises layers of memory cells with L shaped conductive layers where the L shaped conductive layers of each layer are coupled to metal lines disposed above the top or upper most layer such that the memory cells in each layer can be coupled to control circuitry.

公开(公告)号：WO2023076182A1

公开(公告)日：2023-05-04

申请号：PCT/US2022/047603

申请日：2022-10-24

Applicant: APPLIED MATERIALS, INC.

Inventor： MOYNE, James Robert ,  ISKANDAR, Jimmy

IPC: G05B19/418 ,  G05B23/02 ,  G06N20/00

Abstract: A method includes receiving one or more fingerprint dimensions to be used to generate a fingerprint. The method further includes receiving trace data associated with a manufacturing process. The method further includes applying the one or more fingerprint dimensions to the trace data to generate at least one feature. The method further includes generating the fingerprint based on the at least one feature. The method further includes causing, based on the fingerprint, performance of a corrective action associated with one or more manufacturing processes.

公开(公告)号：WO2023069633A1

公开(公告)日：2023-04-27

申请号：PCT/US2022/047297

申请日：2022-10-20

Applicant: APPLIED MATERIALS, INC.

Inventor： DHINDSA, Rajinder

IPC: H01J37/32

Abstract: Embodiments herein provide plasma processing chambers and methods configured for fine-tuning and control over a plasma sheath formed during the plasma- assisted processing of a semiconductor substrate. Embodiments include a sheath tuning scheme, including plasma processing chambers and methods, which can be used to tailor one or more characteristics of a plasma sheath formed between a bulk plasma and a substrate surface. Generally, the sheath tuning scheme provides differently configured pulsed voltage (PV) waveforms to a plurality of bias electrodes embedded beneath the surface of a substrate support in an arrangement where each of the electrodes can be used to differentially bias a surface region of a substrate positioned on the support. The sheath tuning scheme disclosed herein can thus be used to adjust and/or control the directionality, and energy and angular distributions of ions that bombard a substrate surface during a plasma-assisted etch process.

公开(公告)号：WO2023069187A1

公开(公告)日：2023-04-27

申请号：PCT/US2022/041151

申请日：2022-08-23

Applicant: APPLIED MATERIALS, INC.

Inventor： SAMPATH KUMAR, Pradeep ,  TAM, Norman L. ,  IU, Dongming ,  SHARMA, Shashank ,  RIESKE, Eric R. ,  KAMP, Michael P.

IPC: H01L21/321 ,  H01L21/67

Abstract: Aspects of the present disclosure relate to methods, systems, and apparatus for conducting a radical treatment operation on a substrate prior to conducting an annealing operation on the substrate. In one implementation, a method of processing semiconductor substrates includes pre-heating a substrate, and exposing the substrate to species radicals. The exposing of the substrate to the species radicals includes a treatment temperature that is less than 300 degrees Celsius, a treatment pressure that is less than 1.0 Torr, and a treatment time that is within a range of 8.0 minutes to 12.0 minutes. The method includes annealing the substrate after exposing the substrate to the species radicals. The annealing includes exposing the substrate to molecules, an anneal temperature that is 300 degrees Celsius or greater, an anneal pressure that is within a range of 500 Torr to 550 Torr, and an anneal time that is less than 4.0 minutes.