Abstract:
Test arrangement for testing high-frequency components, particularly Silicon Photonics Devices Under Test The invention relates to a probe card (PC) for use with an automatic test equipment (ATE), wherein the probe card (PC) comprises a probe head (PH) on a first side thereof, and wherein the probe card (PC) is adapted to be attached to an interface (IF) and wherein the probe card (PC) comprises a plurality of contact pads on a second side in a region opposing at least a region of the interface (IF), arranged to contact a plurality of contacts of the interface (IF), and wherein the probe card (PC) comprises one or more coaxial connectors (CCPT) arranged to mate with one or more corresponding coaxial connectors (CCPT) of the interface (IF). The invention relates further to pogo tower (PT) for connecting a wafer probe interface (WPI) of an automatic test equipment with the probe card (PC). Additionally, the invention relates to a method for testing a device under test using an automatic test equipment (ATE) with such a pogo tower (PT).
Abstract:
A reconfigurable optic probe is used to measure signals from a device under test. The reconfigurable optic probe is positioned at a target probe location within a cell of the device under test. The cell including a target net to be measured and non-target nets. A test pattern is applied to the cell and a laser probe (LP) waveform is obtained in response. A target net waveform is extracted from the LP waveform by: i) configuring the reconfigurable optic probe to produce a ring-shaped beam having a relatively low-intensity region central to the ring-shaped beam; (ii) re-applying the test pattern to the cell at the target probe location with the relatively low-intensity region applied to the target net and obtaining a cross-talk LP waveform in response; (iii) normalizing the cross-talk LP waveform; and (iv) determining a target net waveform by subtracting the normalized cross-talk LP waveform from the LP waveform.
Abstract:
Die Erfindung betrifft ein Kontaktierungsmodul (1), mittels dem die individuellen elektrischen und optischen Ein- und Ausgänge (A oC ) von optoelektronischen Chips (2) mit den gerätespezifischen elektrischen und optischen Ein- und Ausgängen einer Testapparatur verbunden werden. Es zeichnet sich durch eine vergleichsweise hohe Justierinsensibilität der optischen Kontakte zwischen den Chips (2) und dem Kontaktierungsmodul (1) aus, die z. B. durch technische Maßnahmen erreicht wird, die dazu führen, dass die optischen Eingänge (Ε oK ) des Chips (2) oder am Kontaktierungsmodul (1) in jeder möglichen Justierlage von dem jeweils einzukoppelnden optischen Signal (S o ) überstrahlt werden.
Abstract:
L'invention concerne un procédé et un dispositif de reconstruction d'un signal utile à partir d'un signal acquis composé d'une pluralité d'échantillons représentatifs de grandeurs physiques mesurées, le signal acquis comportant ledit signal utile bruité par un bruit, mis en œuvre par un processeur d'un dispositif programmable. Le procédé comporte une décomposition (32) du signal acquis sur une base de décomposition en ondelettes prédéterminée, selon un nombre de niveaux de décomposition donné, et l'obtention de coefficients d'ondelettes représentatifs dudit signal acquis correspondants, une estimation (42, 44) d'une valeur représentative de l'écart-type dudit bruit à partir d'au moins une partie des coefficients d'ondelettes, et une mise en œuvre (34) d'une méthode itérative de reconstruction de signaux parcimonieux sur le signal acquis, avec un dictionnaire construit à partir de la base de décomposition en ondelettes, ladite méthode itérative ayant un critère d'arrêt associé, le critère d'arrêt étant calculé (50) en fonction de la valeur représentative du bruit estimée.
Abstract:
The patent application refers to a system and method to test components, circuits and complex equipment, used in order to determine the effect of an external particle flux and of radiation, with different energies, upon the characteristics and operating parameters and, if applicable, upon the program which controls the operation of components, circuits and complex equipment located on-board satellites, space ships or planes flying at high altitudes, that may be part of control systems for nuclear reactors or particle accelerators, intended for handling nuclear materials or waste, or used in areas exposed to nuclear accidents. We suggest a method to generate two or more pulsed fluxes of particles, that can eventually be associated with the emission of gamma or X ray radiation, characterized by specific space configurations, with an aim to use them to perform radiation hardening tests on components and complex systems (intended to operate in outer space or in very demanding environments such as nuclear plants or particle accelerators). According to the patent application, the system is made out of at least two separate laser- plasma particle accelerators (3, 4), placed in different locations with respect to the subsystem (1) under test, fixed on the holder system (2) which is able to rotate and translate, horizontally and vertically, so that the incident particle fluxes (5 and 6) can be applied under different optical angles and to different areas of the subsystem (1). Depending on their design, the laser-plasma accelerators (3 and 4) generate at least two pulsed fluxes of accelerated particles (5 and 6) that may contain identical or different types of particles, by applying incident laser pulses (9 and 10) delivered by two separate high power lasers (7 and 8). The laser beam (9) generated by the high power laser (7) is guided by a mirror (11) towards a parabolic mirror (13) that focuses the beam at the input of a laser-plasma accelerator (3). The laser beam (10) delivered by the high power laser (8), is guided by a mirror (12) towards a parabolic mirror (14), that focuses the beam at the input of another laser-plasma accelerator (4). According to the patent application, the method consists of a calibration procedure and the determination of the operating parameters of the subsystem (1) under test, i) in absence of particle fluxes (5 and 6), ii) in presence of particle fluxes (5 and 6), and iii) after applying the particle fluxes (5 and 6) to the subsystem (1).
Abstract:
A pulsed-laser LADA system is provided, which utilizes temporal resolution to enhance spatial resolution. The system is capable of resolving CMOS pairs within the illumination spot using synchronization of laser pulses with the DUT clock. The system can be implemented using laser wavelength having photon energy above the silicon bandgap so as to perform single- photon LADA or wavelength having photon energy below the silicon bandgap so as to generate two-photon LADA. The timing of the laser pulses can be adjusted using two feedback loops tied to the clock signal of an ATE, or by adjusting the ATE's clock signal with reference to a fixed- pulse laser source.
Abstract:
Procédé de caractérisation des conditions d'utilisation d'un composant électronique permettant de limiter sa sensibilité aux interactions énergétiques. On mesure le comportement d'un composant soumis à un rayonnement laser pulsé. On détermine pour quelles valeurs de polarisation, de fréquence et de température(ou autres conditions d'utilisation), ce composant y est sensible en détectant un défaut transitoire ou permanent de fonctionnement du composant. Si nécessaire, on empêche que les courants parasites produits ne détruisent, au moment de ces tests, le composant testé. On en déduit une susceptibilité du composant aux interactions énergétiques et les conditions préférables de fonctionnement de ce composant.
Abstract:
Various methods and systems for using electrical information for a device being fabricated on a wafer to perform one or more defect-related functions are provided. One computer-implemented method includes using electrical information for a device being fabricated on a wafer to perform one or more defect-related functions. The one or more defect-related functions include one or more post-mask, defect-related functions.
Abstract:
A method is disclosed for optically inspecting an integrated circuit (IC) comprising a plurality of semiconductor devices (20) on a first surface of a substrate (10) through a lens (310, 410) in or on an area (40) of a further surface of the substrate (10) opposite the first surface. The method comprises a first step of reducing the thickness of the area (40) such that the area, at least when equipped with the lens (310, 410), has an increased transmittance for light having a predefined wavelength, preferably light having a wavelength in the range of 450-700 nm. In a next step, the lens (310, 410) is placed in or on said area (40). The lens may be formed in said area, or may be a separate lens placed on said area. Finally, a subset of the plurality of semiconductor devices (20) is inspected through the lens (310, 410). The method of the present invention has the advantage that, because of the relationship between optical resolution and light wavelength, a better resolution can be obtained when inspecting the IC.