GATE ELECTRODE FOR MOS TRANSISTORS
    8.
    发明申请
    GATE ELECTRODE FOR MOS TRANSISTORS 审中-公开
    MOS晶体管的栅极电极

    公开(公告)号:WO2004095525A3

    公开(公告)日:2005-02-03

    申请号:PCT/US2004003441

    申请日:2004-02-04

    Abstract: In one embodiment, a gate of a transistor is formed by performing a first thermal treatment on a silicon layer (112'), forming a metal stack (110') over the silicon layer (112'), and performing a second thermal treatment on the metal stack. The first thermal treatment may be a rapid thermal annealing step, while the second thermal treatment may be a rapid thermal nitridation step. The resulting gate exhibits relatively low interface contact resistance between the silicon layer and the metal stack, and may thus be advantageously employed in high-speed devices.

    Abstract translation: 在一个实施例中,通过对硅层(112')进行第一热处理,在硅层(112')上形成金属堆叠(110'),并对第一热处理 金属堆叠。 第一热处理可以是快速热退火步骤,而第二热处理可以是快速热氮化步骤。 所得到的栅极在硅层和金属堆叠之间表现出相对较低的界面接触电阻,因此可有利地用于高速器件中。

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