公开(公告)号：WO2023018623A1

公开(公告)日：2023-02-16

申请号：PCT/US2022/039603

申请日：2022-08-05

Applicant: APPLIED MATERIALS, INC.

Inventor： ZHAO, Qinghua ,  CHENG, Rui ,  HUANG, Ruiyun ,  LEE, Dong Hyung ,  AYDIN, Aykut ,  JANAKIRAMAN, Karthik

IPC: H01L21/321 ,  H01L21/3205 ,  H01L21/3105 ,  H01L21/02

Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-containing material on the substrate. The silicon-containing material may extend within the one or more recessed features along the substrate and a seam or void may be defined by the silicon-containing material within at least one of the one or more recessed features along the substrate. The methods may also include treating the silicon-containing material with a hydrogen-containing gas, such as plasma effluents of the hydrogen-containing gas, which may cause a size of the seam or void to be reduced.

公开(公告)号：WO2022060762A1

公开(公告)日：2022-03-24

申请号：PCT/US2021/050358

申请日：2021-09-15

Applicant: APPLIED MATERIALS, INC.

Inventor： AYDIN, Aykut ,  CHENG, Rui ,  YANG, Yi ,  NITTALA, Krishna ,  JANAKIRAMAN, Karthik ,  QI, Bo ,  MALLICK, Abhijit Basu

IPC: H01L21/02 ,  H01L21/033 ,  C23C16/42 ,  C23C16/505 ,  C23C16/56

Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at.% of a dopant from the dopant-containing precursor.

公开(公告)号：WO2020242645A1

公开(公告)日：2020-12-03

申请号：PCT/US2020/029073

申请日：2020-04-21

Applicant: APPLIED MATERIALS, INC.

Inventor： KOSHIZAWA, Takehito ,  CHENG, Rui ,  SINGH, Tejinder ,  OSHIO, Hidetaka

IPC: H01L21/033 ,  H01L21/02

Abstract: In an embodiment, a method for forming features for semiconductor processing. A first mandrel and a second mandrel are formed on a substrate. A first spacer is formed along a first sidewall of the first mandrel, and a second spacer is formed along a second sidewall of the second mandrel. A gap is defined between the first spacer and the second spacer. The gap is filled by a gap-filling material. In some examples, the gap-filling material includes a doped silicon material. In some examples, the first spacer and the second spacer each include a doped silicon material.

公开(公告)号：WO2018226817A1

公开(公告)日：2018-12-13

申请号：PCT/US2018/036241

申请日：2018-06-06

Applicant: APPLIED MATERIALS, INC.

Inventor： CHENG, Rui ,  WANG, Fei ,  MALLICK, Abhijit Basu ,  VISSER, Robert Jan

IPC: H01L21/02 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213

Abstract: Methods for selective silicon film deposition on a substrate comprising a first surface and a second surface are described. More specifically, the process of depositing a film, treating the film to change some film property and selectively etching the film from various surfaces of the substrate are described. The deposition, treatment and etching can be repeated to selectively deposit a film on one of the two substrate surfaces.

公开(公告)号：WO2022076268A1

公开(公告)日：2022-04-14

申请号：PCT/US2021/053289

申请日：2021-10-04

Applicant: APPLIED MATERIALS, INC.

Inventor： YANG, Yi ,  NITTALA, Krishna ,  CHENG, Rui ,  JANAKIRAMAN, Karthik ,  KEDLAYA, Diwakar ,  HUANG, Zubin ,  AYDIN, Aykut

IPC: H01L21/02 ,  H01L21/033

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.

公开(公告)号：WO2022020145A1

公开(公告)日：2022-01-27

申请号：PCT/US2021/041518

申请日：2021-07-14

Applicant: APPLIED MATERIALS, INC.

Inventor： KOSHIZAWA, Takehito ,  JANAKIRAMAN, Karthik ,  CHENG, Rui ,  NITTALA, Krishna ,  LI, Menghui ,  CHUANG, Ming-Yuan ,  SHINOHARA, Susumu ,  GUO, Juan ,  YANG, Xiawan ,  TEO, Russell Chin Yee ,  LI, Zihui ,  KAO, Chia-Ling ,  JIN, Qu ,  WANG, Anchuan

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/02

Abstract: Exemplary processing methods may include depositing a boron-containing material or a silicon-and-boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The methods may include etching portions of the boron-containing material or the silicon-and-boron-containing material with a chlorine- containing precursor to form one or more features in the substrate. The methods may also include removing remaining portions of the boron-containing material or the silicon-and-boron-containing material from the substrate with a fluorine-containing precursor.

公开(公告)号：WO2021091786A1

公开(公告)日：2021-05-14

申请号：PCT/US2020/058197

申请日：2020-10-30

Applicant: APPLIED MATERIALS, INC.

Inventor： HUANG, Zubin ,  CHENG, Rui ,  LI, Jian

IPC: H01L21/67 ,  H01L21/687 ,  H01J37/32

Abstract: Exemplary temperature modulation methods may include delivering a gas through a purge line extending within a substrate support. The gas may be directed to a backside surface of the substrate support opposite a substrate support surface. The purge line may extend along a central axis of a shaft, the shaft being hermetically sealed with the substrate support. The substrate support may be characterized by a center and a circumferential edge. A first end of the purge line may be fixed at a first distance from the backside surface of the substrate support. The methods may include flowing the gas at a first flow rate via a flow pathway to remove heat from the substrate support to achieve a desired substrate support temperature profile.

公开(公告)号：WO2017127233A1

公开(公告)日：2017-07-27

申请号：PCT/US2017/012170

申请日：2017-01-04

Applicant: APPLIED MATERIALS, INC.

Inventor： KWON, Thomas Jongwan ,  CHENG, Rui ,  MALLICK, Abhijit Basu ,  PING, Er-Xuan ,  AHN, Jaesoo

IPC: G03F1/00 ,  G03F1/80 ,  H01L21/033 ,  H01L21/311 ,  H01L21/02

CPC classification number: H01L21/0338 ,  H01L21/02109 ,  H01L21/02115 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L27/11582 ,  H01L28/00

Abstract: Implementations of the present disclosure relate to improved hardmask materials and methods for patterning and etching of substrates. A plurality of hardmasks may be utilized in combination with patterning and etching processes to enable advanced device architectures. In one implementation, a first hardmask and a second hardmask disposed on a substrate having various material layers disposed thereon. The second hardmask may be utilized to pattern the first hardmask during a first etching process. A third hardmask may be deposited over the first and second hardmasks and a second etching process may be utilized to form channels in the material layers.

Abstract translation: 本公开的实施方式涉及用于图案化和蚀刻基板的改进的硬掩模材料和方法。 多个硬掩模可以与图案化和蚀刻工艺结合使用以实现高级器件架构。 在一个实施方式中，设置在其上设置有各种材料层的基板上的第一硬掩模和第二硬掩模。 第二硬掩模可用于在第一蚀刻工艺期间图案化第一硬掩模。 可以在第一和第二硬掩模上沉积第三硬掩模，并且可以利用第二蚀刻工艺在材料层中形成沟道。

公开(公告)号：WO2016160811A1

公开(公告)日：2016-10-06

申请号：PCT/US2016/024723

申请日：2016-03-29

Applicant: APPLIED MATERIALS, INC.

Inventor： MANNA, Pramit ,  CHENG, Rui ,  CHAN, Kelvin ,  MALLICK, Abhijit Basu

IPC: H01L21/205 ,  C23C16/44

CPC classification number: H01L21/76846 ,  C23C16/045 ,  C23C16/16 ,  C23C16/342 ,  C23C16/46 ,  H01L21/28556 ,  H01L21/76864 ,  H01L21/76877

Abstract: Implementations of the present disclosure generally relate to methods for forming thin films in high aspect ratio feature definitions. In one implementation, a method of processing a substrate in a process chamber is provided. The method comprises flowing a boron-containing precursor comprising a ligand into an interior processing volume of a process chamber, flowing a nitrogen-containing precursor comprising the ligand into the interior processing volume and thermally decomposing the boron-containing precursor and the nitrogen-containing precursor in the interior processing volume to deposit a boron nitride layer over at least one or more sidewalls and a bottom surface of a high aspect ratio feature definition formed in and below a surface of a dielectric layer on the substrate.

Abstract translation: 本公开的实施方式一般涉及用于在高纵横比特征定义中形成薄膜的方法。 在一个实施方式中，提供了一种在处理室中处理衬底的方法。 该方法包括将包含配体的含硼前体流入处理室的内部处理体积，将含有配体的含氮前体流入内部处理体积并热分解含硼前体和含氮前体 在内部处理体积中，在形成在基板上的电介质层的表面中和下方的高纵横比特征定义的至少一个或多个侧壁和底表面上沉积氮化硼层。

公开(公告)号：WO2022231886A1

公开(公告)日：2022-11-03

申请号：PCT/US2022/025281

申请日：2022-04-19

Applicant: APPLIED MATERIALS, INC.

Inventor： AYDIN, Aykut ,  CHENG, Rui ,  JANAKIRAMAN, Karthik

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/033

Abstract: Exemplary deposition methods may include delivering a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the boron-containing precursor. The dopant-containing precursor may include a metal. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a doped-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The doped-boron material may include greater than or about 80 at.% of boron in the doped-boron material.