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公开(公告)号:WO2021079131A1
公开(公告)日:2021-04-29
申请号:PCT/GB2020/052672
申请日:2020-10-22
Applicant: PRAGMATIC PRINTING LTD.
Inventor: PRICE, Richard , COBB, Brian
Abstract: An electronic circuit comprises a first resistor (1) and a second resistor (2). The first resistor comprises: a first sheet (10) of resistive material; and a first pair (11, 12) of conductive contacts, each arranged in electrical contact with the first sheet, and arranged such that a shortest resistive path in the first sheet between the first pair of contacts passes through the first sheet and has a length equal to a thickness (LI) of the first sheet. The second resistor comprises: a second sheet (20) of resistive material; and a second pair (21, 22) of conductive contacts, each arranged in electrical contact with the second sheet, and arranged such that a shortest resistive path (L2) in the second sheet between the second pair of contacts passes along at least a portion of a length of the second sheet.
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公开(公告)号:WO2019116020A1
公开(公告)日:2019-06-20
申请号:PCT/GB2018/053588
申请日:2018-12-11
Applicant: PRAGMATIC PRINTING LTD
Inventor: ALKHALIL, Feras , PRICE, Richard , COBB, Brian
IPC: H01L29/872 , H01L21/329 , H01L29/417 , H01L29/47 , H01L51/05 , H01L29/06 , H01L29/20 , H01L29/16 , H01L29/24 , H01L29/22
Abstract: A Schottky diode comprises:a first electrode;a second electrode; and a body of semiconductive material connected to the first electrode at a first interface and connected to the second electrode at a second interface,wherein the first interface comprises a first planar region lying in a first plane and the first electrode has a first projection onto the first plane in a first direction normal to the first plane, the second interface comprises a second planar region lying in a second plane and the second electrode has a second projection onto the first plane in said first direction, at least a portion of the second projection lies outside the first projection, said second planar region is offset from the first planar region in said first direction, and one of the first interface and the second interface provides a Schottky contact.
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公开(公告)号:WO2020053574A1
公开(公告)日:2020-03-19
申请号:PCT/GB2019/052524
申请日:2019-09-10
Applicant: PRAGMATIC PRINTING LTD.
Inventor: COBB, Brian
IPC: H01L23/528 , H01L23/522 , H01L27/12
Abstract: An electronic circuit is described, comprising: a first power rail; a second power rail; and a field effect transistor, FET, the FET comprising: a first terminal coupled directly or indirectly to the first power rail; a second terminal coupled directly or indirectly to the second power rail; a channel of semiconductive material connecting the first terminal to the second terminal; a gate terminal to which a voltage may be applied to control a conductivity of the channel, the channel providing a conduction path from the first terminal to the second terminal; and a gate dielectric arranged to insulate the gate terminal from the channel. The circuit further comprises a layer or other body of dielectric material, the gate dielectric being a first portion of the layer or other body of dielectric material. The first power rail comprises a first rail portion arranged on a first side of a second portion of the layer or other body of dielectric material, and the second power rail comprises a second rail portion arranged on a second side of the second portion of the layer or other body of dielectric material, the second side being opposite the first side. The second portion of the layer or other body of dielectric material separates the first and second rail portions and with the first and second rail portions provides a capacitance to the circuit.
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公开(公告)号:WO2020161027A1
公开(公告)日:2020-08-13
申请号:PCT/EP2020/052511
申请日:2020-01-31
Applicant: PRAGMATIC PRINTING LTD.
Inventor: COBB, Brian , WHITE, Scott , WILLIAMSON, Ken , SOU, Anthony , RAMSDALE, Catherine , MANN, Rob , DAVIES, Neil , OLIVEIRA, Joao de , EWERS, Gillian , BOULANGER, Pascaline , PRICE, Richard
IPC: H01L23/538 , H01L23/498
Abstract: The present invention provides for an interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly comprises a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within said flexible base layer, and at least one first patterned contact layer, provided on any one of said first surface and said second surface of said flexible base layer and which is configured to operably interface with said at least one active electronic circuit component and the at least one 1C component.
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公开(公告)号:WO2019048892A1
公开(公告)日:2019-03-14
申请号:PCT/GB2018/052577
申请日:2018-09-11
Applicant: PRAGMATIC PRINTING LTD.
Inventor: COBB, Brian , WHITE, Scott
CPC classification number: H04W12/06 , H04L9/3236 , H04W12/00407
Abstract: A method, apparatus and system for secure one-way RFID tag identifications provided. The method comprising generating, at an RFID tag, an auxiliary identifier; generating, at an RFID tag, a secure representation based on the auxiliary identifier; transmitting, from the RFID tag and receiving at an RFID reader, one or more representations of the auxiliary identifier and the tag identifier including the secure representation; and verifying the identity of the RFID tag based on the received representations.
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公开(公告)号:WO2019043355A1
公开(公告)日:2019-03-07
申请号:PCT/GB2018/052327
申请日:2018-08-16
Applicant: PRAGMATIC PRINTING LTD.
Inventor: PRICE, Richard , DEVENPORT, Stephen , COBB, Brian
Abstract: The present invention relates to a method and apparatus for manufacturing a plurality of electronic circuits (7), each electronic circuit (7) comprising a respective flexible first portion (5), comprising a respective group of contact pads (contacts) (35), and a respective flexible electronic component (a flexible integrated circuit, IC) (3), comprising a respective group of terminals (37) and mounted on the respective group of contact pads (35) with each terminal (37) in electrical contact with a respective contact pad (35), the method comprising: • providing (e.g. manufacturing) a flexible first structure (flexible substrate) (15), e.g. a flexible web, comprising the plurality of flexible first portions (5); • providing (e.g. manufacturing) a second structure comprising the plurality of flexible ICs (3) and a common support (11) arranged to support the plurality of flexible ICs (3); • dispensing an adhesive (9) onto the flexible first structure (15) and/ or onto the flexible ICs (3); • transferring said flexible ICs (3) from the common support (11) onto the flexible first structure (15) such that each group of terminals (37) is mounted on (brought into electrical contact with) a respective group of contact pads (35) to form an electronic circuit (7), • providing a heated surface (23a) and an opposing surface (23b, 117) (a pair of nip rollers (17a, 17b) or a roller (17a) and a planar surface (117)) together having a gap (19) therebetween, • transferring the flexible first structure (15), comprising the electronic circuits (7), between the heated surface (23a) and the opposing surface (23b, 117) such that the adhesive (9) is cured by application of heat and pressure from the heated surface (23a) and the opposing surface (23b, 117), thereby adhering the IC (3) onto the respective first portion (5). A silicone paper layer (26) may be located between the electronic circuits (7) and the heated surface (23a) to protect the heated surface (23a) from fouling with excess adhesive.
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公开(公告)号:WO2020234582A1
公开(公告)日:2020-11-26
申请号:PCT/GB2020/051221
申请日:2020-05-19
Applicant: PRAGMATIC PRINTING LTD.
Inventor: COBB, Brian , PRICE, Richard
IPC: H01L23/00 , H01L23/64 , H01L23/552
Abstract: There is provided a flexible electronic structure for bonding with an external circuit. The flexible electronic structure comprising: a flexible body having a first surface, the flexible body comprising at least one electronic component; at least one contact element configured to bond with the external circuit, the at least one contact element operatively coupled with the at least one electronic component and provided at the first surface of the flexible body, and arranged to operably interface with the external circuit after bonding, and at least one support element provided at the first surface of the flexible body, each support element arranged to contact a corresponding surface element disposed on a first surface of an external structure comprising the external circuit.
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公开(公告)号:WO2019150093A1
公开(公告)日:2019-08-08
申请号:PCT/GB2019/050243
申请日:2019-01-30
Applicant: PRAGMATIC PRINTING LTD.
Inventor: PRICE, Richard , COBB, Brian , DAVIES, Neil
CPC classification number: H01L21/7806 , H01L21/6835 , H01L21/6836 , H01L23/544 , H01L27/1218 , H01L27/1259 , H01L27/1266 , H01L2221/6835 , H01L2221/68381 , H01L2223/5442 , H01L2223/54426 , H01L2223/54433 , H01L2223/54486
Abstract: The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.
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