Abstract:
Halbzeuganordnung aus einer Folie (20) und einer Vielzahl von Solarzelleneinheiten (30) und Herstellungsverfahren, wobei die Folie (20) eine adhäsive, plane Oberfläche (22) aufweist, jede Solarzelleneinheiten (30) einen elektrisch isolierenden, Keramik umfassenden Träger (32) mit einer von mindestens vier Kanten (32.1, 32.2, 32.3, 32.4) umschlossenen Oberseite und einer Unterseite aufweist, die Unterseite jeder Solarzelleneinheit (30) kraftschlüssig mit der Oberfläche (22) der Folie (20) verbunden ist, auf der Oberseite jedes Trägers (32) mindestens zwei zueinander beabstandete Kontaktflächen (40, 42, 44) entlang einer ersten Kante (32.1) und mindestens ein als Solarzelle ausgebildeter Halbleiterkörper (50) zwischen den mindestens zwei Kontaktflächen (40, 42, 44) und einer der ersten Kante (32.1) gegenüberliegenden zweiten Kante (32.2) angeordnet sind, auf dem mindestens einen Halbleiterkörper (50) jedes Trägers (32) ein sekundäres optisches Element (60) angeordnet und eine plane Unterseite (62) des sekundären optischen Elements (60) mit einer Empfängerfläche (52) des Halbleiterkörper (50) kraftschlüssig verbunden ist, um Licht auf die Empfängerfläche (52) des Halbleiterkörpers (50) zu führen, die Solarzelleneinheiten (30) jeweils zueinander beabstandet auf der Oberfläche (22) der Folie (20) angeordnet sind, wobei jeweils die erste Kante (32.1) jeder Solarzelleneinheit (30) einer ersten Kante (32.1) einer anderen Solarzelleneinheit (30) gegenüberliegt.
Abstract:
The yield of a manufacturing process of a semiconductor device is increased. The productivity of a semiconductor device is increased. A first material layer is formed over a substrate, a second material layer is formed over the first material layer, and the first material layer and the second material layer are separated from each other, so that a semiconductor device is manufactured. In addition, a stack including the first material layer and the second material layer is preferably heated before the separation. The first material layer includes one or more of hydrogen, oxygen, and water. The first material layer includes a metal oxide, for example. The second material layer includes a resin (e.g., polyimide or acrylic). The first material layer and the second material layer are separated from each other by cutting a hydrogen bond. The first material layer and the second material layer are separated from each other in such a manner that water separated out by heat treatment at an interface between the first material layer and the second material layer or in the vicinity of the interface is irradiated with light.
Abstract:
A method of making a micro-transfer printed system includes providing a source wafer (10) having a plurality of micro-transfer printable source devices (12 arranged at a source spatial density; providing an intermediate wafer (20) having a plurality of micro-transfer printable intermediate supports (24) arranged at an intermediate spatial density less than or equal to the source spatial density; providing a destination substrate (30); micro-transfer printing the source devices from the source wafer to the intermediate supports of the intermediate wafer with a source stamp having a plurality of posts at a source transfer density to make an intermediate device (22) on each intermediate support; and micro-transfer printing the intermediate devices from the intermediate wafer to the destination substrate at a destination spatial density less than the source spatial density with an intermediate stamp having a plurality of posts at an intermediate transfer density less than the source transfer density.
Abstract:
Methods include processing a substrate including a step of pressing a wedge against at least an outer portion of a carrier bonded to the substrate. The method further includes a step of initiating debonding at a location of an outer peripheral bonded interface between the substrate and the carrier. The step of initiating debonding is achieved by providing relative movement between the wedge and an outer edge portion of the substrate.
Abstract:
A device having embedded metallic structures in a glass is provided. The device includes a first wafer, at least one conductive trace, a planarized insulation layer and a second wafer. The first wafer has at least one first wafer via that is filled with conductive material. The at least one conductive trace is formed on the first wafer. The at least one conductive trace is in contact with the at least one first wafer via that is filled with the conductive material. The planarized insulation layer is formed over the first wafer and at least one conductive trace. The planarized insulation layer further has at least one insulation layer via that provides a path to a portion of the at least one conductive trace. The second wafer is bonded to the planarized insulation layer.
Abstract:
A multi-layer cover tape construction includes a polymeric substrate with a first major surface and a second major surface; an adhesive layer disposed on the first major surface of the first substrate; and an antistatic layer disposed on the first major surface of the first substrate. The polymeric substrate has a surface energy of between 5 and 500 mN/m, and a surface roughness of between 0.1 and 5µm.
Abstract:
A method of making a semiconductor device can comprise providing a temporary carrier comprising a semiconductor die mounting site, and forming an insulating layer over the temporary carrier. Conductive pads can be formed within openings in the insulating layer and be positioned both within and without the die mounting area. A backside redistribution layer (RDL) can be formed over the temporary carrier before mounting a semiconductor die at the die mounting site. Conductive interconnects can be formed over the temporary carrier in a periphery of the semiconductor die mounting site. A semiconductor die can be mounted face up to the insulating layer. The conductive interconnects, backside RDL, and semiconductor die can be encapsulated with a mold compound. A build-up interconnect structure can be formed and connected to the semiconductor die and the conductive interconnects. The temporary carrier can be removed and the conductive pads exposed in a grinding process.