公开(公告)号：WO2009139567A2

公开(公告)日：2009-11-19

申请号：PCT/KR2009/002487

申请日：2009-05-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHO, Kyoung Lae ,  KIM, Yong June ,  SONG, Seung-Hwan ,  KONG, Jun Jin

IPC: G06F7/32 ,  G06F1/28

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C2211/5621

Abstract: Provided are memory devices and memory programming methods. A memory device may include a multi-bit cell array including a plurality of multi-bit cells, a programming unit configured to program a first data page in the plurality of multi-bit cells and to program a second data page in the multi-bit cells with the programmed first data page, a first controller configured to divide the multi-bit cells with the programmed first data page into a first group and a second group, and a second controller configured to set a target threshold voltage interval of each of the multi-bit cells included in the first group based on first read voltage levels and the second data page, and to set a target threshold voltage interval of each of the multi-bit cells included in the second group based on second read threshold voltage levels and the second data page.

Abstract translation: 提供的是存储器件和存储器编程方法。 存储器件可以包括包括多个多位单元的多位单元阵列，编程单元，被配置为对多个多位单元中的第一数据页进行编程，并编程多位单元中的第二数据页 具有编程的第一数据页的单元，被配置为将多位单元与编程的第一数据页划分为第一组和第二组的第一控制器，以及配置成将每个的第一数据页的目标阈值电压间隔 基于第一读取电压电平和第二数据页面包括在第一组中的多位单元，并且基于第二读取阈值电压电平来设置包括在第二组中的每个多位单元的目标阈值电压间隔，以及 第二个数据页面。

公开(公告)号：WO2009104855A1

公开(公告)日：2009-08-27

申请号：PCT/KR2008/006187

申请日：2008-10-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SONG, Seung-Hwan ,  EUN, Heeseok ,  YU, Donghun ,  KONG, Jun Jin

IPC: G11C16/04

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C29/00

Abstract: Provided are memory devices and memory data read methods. A method device may include: a multi-bit cell array; a decision unit that may detect threshold voltages of multi-bit cells of the multi-bit cell array to decide first data from the detected threshold voltages, using a first decision value; an error detector that may detect an error bit of the first data; and a determination unit that may determine whether the decision unit decides second data from the detected threshold voltages using a second decision value, based on a number of detected error bits, the second decision value being different from the first decision value. Through this, it is possible to reduce time spent for reading data stored in the multi-bit cell.

Abstract translation: 提供的是存储器件和存储器数据读取方法。 方法设备可以包括：多比特单元阵列; 判定单元，其可以使用第一判定值来检测所述多比特单元阵列的多比特单元的阈值电压以从所述检测到的阈值电压中确定第一数据; 可以检测第一数据的错误位的错误检测器; 以及确定单元，其可以基于检测到的错误位的数量来确定判定单元是否使用第二判定值从检测到的阈值电压确定第二数据，第二判定值与第一判定值不同。 通过这种方式，可以减少读取存储在多位单元中的数据所花费的时间。

公开(公告)号：WO2008143392A1

公开(公告)日：2008-11-27

申请号：PCT/KR2008/000041

申请日：2008-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： PARK, Sung Chung ,  KONG, Jun Jin ,  LEE, Seung Jae ,  SONG, Seung-Hwan

IPC: H03M13/45

CPC classification number: H04L25/067 ,  H04L27/06 ,  H04L27/22

Abstract: According to an example embodiment, a method of generating a soft decision value using an Analog-to-Digital Converter (ADC) having a given resolution may include receiving metric values calculated based on levels of a transmission signal and output levels of the ADC. Metric values corresponding to a level of a received signal may be selected from among the received metric values. A first maximum metric value may be detected from among the selected metric values when a transmission bit is a first level, and a second maximum metric value may be detected from among the selected metric values when the transmission bit is a second level. The soft decision value may be generated based on a difference between the first maximum metric value and the second maximum metric value.

Abstract translation: 根据示例实施例，使用具有给定分辨率的模数转换器（ADC）产生软判决值的方法可以包括基于传输信号的电平和ADC的输出电平来计算的度量值。 可以从接收到的度量值中选择与接收信号的电平对应的度量值。 当传输位是第一级时，可以从选择的度量值中检测第一最大度量值，并且当传输位是第二级时，可以从所选择的度量值中检测第二最大度量值。 可以基于第一最大度量值和第二最大度量值之间的差异来生成软判决值。

公开(公告)号：WO2009139574A2

公开(公告)日：2009-11-19

申请号：PCT/KR2009/002530

申请日：2009-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KIM, Yong June ,  KIM, Jae Hong ,  KONG, Jun Jin ,  CHO, Kyoung Lae

IPC: G06F7/32 ,  G06F1/28

CPC classification number: G11C16/10 ,  G06F11/1072 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3454 ,  G11C29/00 ,  G11C2211/5621 ,  G11C2211/5634

Abstract: Memory devices and/or methods of managing memory data errors are provided. A memory device detects and corrects an error bit of data read from a plurality of memory cells, and identifies a memory cell storing the detected error bit. The memory device assigns a verification voltage to each of the plurality of first memory cells, the assigned verification voltage corresponding to the corrected bit for the identified memory cell, the assigned verification voltage corresponding to the read data for the remaining memory cells. The memory device readjusts the data stored in the plurality of memory cells using the assigned verification voltage. Through this, it is possible to increase a retention period of the data of the memory device.

Abstract translation: 提供了存储器件和/或管理存储器数据错误的方法。 存储器件检测并校正从多个存储器单元读取的数据的错误位，并且识别存储检测到的错误位的存储单元。 存储装置向多个第一存储器单元中的每一个分配验证电压，对应于所识别的存储单元的校正位的分配的验证电压，对应于剩余存储单元的读取数据的分配验证电压。 存储装置使用分配的验证电压重新调整存储在多个存储单元中的数据。 由此，可以增加存储装置的数据的保持期。

公开(公告)号：WO2009116718A1

公开(公告)日：2009-09-24

申请号：PCT/KR2008/007371

申请日：2008-12-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KIM, Jae Hong ,  EUN, Heeseok ,  KIM, Yong June ,  KONG, Jun Jin ,  SONG, Seung-Hwan

IPC: G11C7/10

CPC classification number: G06N99/005

Abstract: Disclosed are a memory device and a data decision method. The memory device may include a memory cell array, and a decision unit configured to read first data from the memory cell array via a first channel, perform at least one of a hard and soft decision on the first data using a first number of decision levels set based on characteristics of the first channel, read second data from the memory cell array via a second channel, and perform a soft decision on the second data using a second number of decision levels set based on characteristics of the second channel.

Abstract translation: 公开了一种存储器件和数据判定方法。 存储器装置可以包括存储单元阵列，以及判定单元，被配置为经由第一通道从存储单元阵列读取第一数据，使用第一数量的判定级别对第一数据执行硬判决和软判决中的至少一个 基于第一信道的特性设置，经由第二信道从存储器单元阵列读取第二数据，并且使用基于第二信道的特性设置的第二数量的判定级来对第二数据执行软判决。

公开(公告)号：WO2009113760A1

公开(公告)日：2009-09-17

申请号：PCT/KR2008/006578

申请日：2008-11-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： EUN, Heeseok ,  KIM, Jae Hong ,  KONG, Jun Jin

IPC: G11C16/34

CPC classification number: G11C29/52 ,  G11C11/5642 ,  G11C29/00 ,  G11C2029/0411 ,  G11C2211/5634

Abstract: The data detecting apparatus may provide a voltage comparison unit that compares a reference voltage, associated with a specific data bit from among a plurality of data bits stored in a memory cell, with a threshold voltage in the memory cell, a detection unit that detects a value of the specific data bit based on a result of the voltage comparison unit, and a decision unit that decides whether the specific data bit is successfully detected based on whether an error occurs in the detected data. The detection unit may re-detect a value of the specific data bit based on detection information with respect to at least one of an upper data bit and a lower data bit in relation to the specific data bit, in response to a result of the decision unit.

Abstract translation: 数据检测装置可以提供电压比较单元，其将存储在存储单元中的多个数据位中的与特定数据位相关联的参考电压与存储单元中的阈值电压进行比较，检测单元检测 基于电压比较单元的结果的特定数据位的值，以及判定单元，其基于检测到的数据中是否发生错误来判定是否成功检测到特定数据位。 响应于决定的结果，检测单元可以基于关于特定数据比特的上位数据位和下位数据位中的至少一个的检测信息重新检测特定数据位的值 单元。

公开(公告)号：WO2008117921A1

公开(公告)日：2008-10-02

申请号：PCT/KR2008/000145

申请日：2008-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KONG, Jun Jin ,  PARK, Sung Chung ,  KANG, Dongku ,  CHAE, Dong Hyuk ,  LEE, Seung Jae ,  JO, Nam Phil ,  SONG, Seung-Hwan

IPC: G11C29/42

CPC classification number: G11C29/42 ,  G06F11/1068 ,  G11C11/5628 ,  G11C29/028 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: Various read level control apparatuses and methods are provided. In various embodiments, the read level control apparatuses may include an error control code (ECC) decoding unit for ECC decoding data read from a storage unit, and a monitoring unit for monitoring a bit error rate (BER) based on the ECC decoded data and the read data. The apparatus may additionally include an error determination unit for determining an error rate of the read data based on the monitored BER, and a level control unit for controlling a read level of the storage unit based on the error rate.

Abstract translation: 提供各种读取级别控制装置和方法。 在各种实施例中，读取电平控制装置可以包括用于对从存储单元读取的数据进行ECC解码的错误控制码（ECC）解码单元和用于基于ECC解码数据监视误码率（BER）的监视单元，以及 读数据。 该装置还可以包括用于基于所监视的BER确定读取数据的错误率的错误确定单元，以及用于基于错误率来控制存储单元的读取电平的电平控制单元。

公开(公告)号：WO2009116715A1

公开(公告)日：2009-09-24

申请号：PCT/KR2008/006190

申请日：2008-10-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YU, Donghun ,  CHO, Kyoung Lae ,  KANG, Dongku ,  CHAE, Dong Hyuk ,  KONG, Jun Jin

IPC: G11C16/34

CPC classification number: G11C16/26 ,  G06F11/1072 ,  G11C11/5628 ,  G11C11/5642 ,  G11C29/00 ,  G11C2029/0411 ,  G11C2211/5621

Abstract: Disclosed are a memory device and a memory data reading method. The memory device may include a multi-bit cell array, a threshold voltage detecting unit configured to detect first threshold voltage intervals including threshold voltages of multi-bit cells of the multi-bit cell array from among a plurality of threshold voltage intervals, a determination unit configured to determine data of a first bit layer based on the detected first threshold voltage intervals, and an error detection unit configured to detect an error bit of the data of the first bit layer. In this instance, the determination unit may determine data of a second bit layer using a second threshold voltage interval having a value of the first bit layer different from the detected error bit and being nearest to a threshold voltage of a multi-bit cell corresponding to the detected error bit.

Abstract translation: 公开了一种存储器件和存储器数据读取方法。 存储器件可以包括多位单元阵列，阈值电压检测单元，被配置为从多个阈值电压间隔中检测包括多位单元阵列的多位单元的阈值电压的第一阈值电压间隔， 单元，被配置为基于检测到的第一阈值电压间隔来确定第一位层的数据;以及错误检测单元，被配置为检测第一位层的数据的错误位。 在这种情况下，确定单元可以使用具有与检测到的错误位不同的第一位层的值的第二阈值电压间隔来确定第二位层的数据，并且最接近对应于多个位单元的阈值电压 检测到错误位。

公开(公告)号：WO2009102105A1

公开(公告)日：2009-08-20

申请号：PCT/KR2008/006185

申请日：2008-10-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SONG, Seung-Hwan ,  KONG, Jun Jin ,  KIM, Jae Hong ,  LEE, Young Hwan ,  CHAE, Dong Hyuk ,  KIM, Tae Hun ,  CHO, Kyoung Lae

IPC: G11C16/00

CPC classification number: G11C16/3418 ,  G11C7/04 ,  G11C11/5621 ,  G11C16/3427 ,  G11C16/349 ,  G11C29/00

Abstract: A memory device and a memory device heat treatment method are provided. The memory device may include: a non-volatile memory device; one or more heating devices configured to contact with the non-volatile memory device and heat the non-volatile memory device; and a controller configured to control an operation of the one or more heating devices based on operational information of the non-volatile memory device. Through this, it may be possible to improve an available period of the non-volatile memory device.

Abstract translation: 提供了一种存储器件和存储器件热处理方法。 存储器件可以包括：非易失性存储器件; 配置成与所述非易失性存储器件接触并加热所述非易失性存储器件的一个或多个加热器件; 以及控制器，被配置为基于所述非易失性存储器件的操作信息来控制所述一个或多个加热装置的操作。 由此，可以改善非易失性存储器件的可用周期。

公开(公告)号：WO2009051322A1

公开(公告)日：2009-04-23

申请号：PCT/KR2008/001998

申请日：2008-04-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SONG, Seung-Hwan ,  CHO, Kyoung Lae ,  EUN, Heeseok ,  CHAE, Dong Hyuk ,  KONG, Jun Jin ,  PARK, Sung Chung

IPC: G11C16/34

CPC classification number: G11C16/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/3418 ,  G11C2211/5621

Abstract: Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may comprise: a multi-bit cell array that includes a first multi-bit cell and a second multi-bit cell; a programming unit for programming first data in the first multi-bit cell, and programming second data in the second multi-bit cell; and a verification unit for verifying whether the first data is programmed in the first multi-bit cell using a first verification voltage, and verifying whether the second data is programmed in the second multi-bit cell using a second verification voltage. The multi-bit programming apparatus may generate better threshold voltage distributions in a multi-bit cell memory.

Abstract translation: 提供了多位编程设备和/或方法。 多比特编程装置可以包括：包括第一多比特小区和第二多比特小区的多比特单元阵列; 编程单元，用于对第一多位单元中的第一数据进行编程，以及编程第二多位单元中的第二数据; 以及验证单元，用于使用第一验证电压来验证第一数据是否被编程在第一多位单元中，以及使用第二验证电压来验证第二数据是否被编程在第二多位单元中。 多比特编程装置可以在多比特单元存储器中产生更好的阈值电压分布。