公开(公告)号：WO2022245422A2

公开(公告)日：2022-11-24

申请号：PCT/US2022/020907

申请日：2022-03-18

Applicant: WOLFSPEED, INC.

Inventor： GUO, Jia ,  SRIRAM, Saptharishi ,  SHEPPARD, Scott

IPC: H01L29/778 ,  H01L29/20 ,  H01L21/28587 ,  H01L21/7605 ,  H01L21/765 ,  H01L29/1075 ,  H01L29/2003 ,  H01L29/36 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787

Abstract: A transistor device includes a channel layer, a barrier layer on the channel layer, and source and drain contacts on the barrier layer, and a gate contact on the barrier layer between the source and drain contacts. The channel layer includes a sub-layer having an increased doping concentration level relative to a remaining portion of the channel layer. The presence of the sub-layer may reduce drain lag without substantially increasing gate lag. The sub-layer may be a buried sub-layer, and the device may further include a second sub-layer between the buried sub-layer and the barrier layer.

公开(公告)号：WO2022003265A1

公开(公告)日：2022-01-06

申请号：PCT/FR2021/051069

申请日：2021-06-15

Applicant: EXAGAN

Inventor： JUNG, Robin

IPC: H01L23/48 ,  H01L23/482 ,  H01L23/522 ,  H01L29/423 ,  H01L23/481 ,  H01L23/4824 ,  H01L23/5226 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/7786

Abstract: L'invention concerne un transistor à effet de champ (100) présentant une structure interdigitée et comprenant : plusieurs cellules élémentaires de transistor (50) disposées en parallèle, chaque cellule élémentaire comprenant une électrode de source (1), une électrode de drain (3) et une électrode de grille (2) intercalée entre les électrodes de source et de drain, un terminal de source (10) et un terminal de drain (30) respectivement connectés aux électrodes de sources (1) et aux électrodes de drain (3) des cellules élémentaires (50), un terminal de grille (20) connecté aux électrodes de grille (2) des cellules élémentaires. Le transistor à effet de champ (100) comprend uniquement des vias conducteurs verticaux pour connecter les électrodes de grille au terminal de grille, et le terminal de grille (20) est disposé à l'aplomb de tout ou partie des cellules élémentaires (50).

公开(公告)号：WO2021194981A1

公开(公告)日：2021-09-30

申请号：PCT/US2021/023505

申请日：2021-03-22

Applicant: QUALCOMM INCORPORATED

Inventor： YANG, Haining ,  LI, Xia ,  YANG, Bin

IPC: H01L23/48 ,  H01L21/8238 ,  H01L23/528 ,  H01L23/538 ,  H01L27/02 ,  H01L27/092 ,  H01L21/82385 ,  H01L21/823871 ,  H01L23/481 ,  H01L23/5283 ,  H01L27/0207 ,  H01L27/0922 ,  H01L27/0924 ,  H01L29/402

Abstract: An integrated device that includes a substrate, a first transistor located over the substrate, where the first transistor includes a gate. The integrated device includes a first gate contact coupled to the gate of the first transistor, where the first gate contact is configured to be electrically coupled to an interconnect of the integrated device. The integrated device includes a second gate contact coupled to the gate, where the second gate contact is directly electrically coupled to only the gate.

公开(公告)号：WO2021146229A1

公开(公告)日：2021-07-22

申请号：PCT/US2021/013160

申请日：2021-01-13

Applicant: CREE, INC.

Inventor： JONES, Evan ,  FISHER, Jeremy

IPC: H01L21/8252 ,  H01L27/06 ,  H01L27/07 ,  H01L49/02 ,  H01L29/20 ,  H01L27/0605 ,  H01L27/0629 ,  H01L27/0733 ,  H01L28/40 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/452 ,  H01L29/7783 ,  H01L29/7786 ,  H01L29/92

Abstract: A High Mobility Electron Transistor, HEMT, (10) and a capacitor (14, 18, 20, 22, 24) co-formed on an integrated circuit share at least one structural feature, thereby tightly integrating the two components. In one embodiment, the shared feature may be a 2DEG channel of the HEMT (10), which also functions in lieu of a base metal layer of a conventional capacitor (12). In another embodiment, a dialectic layer of the capacitor (14, 18, 20, 22, 24) may be formed in a passivation step of forming the HEMT (10). In another embodiment, a metal contact of the HEMT (10) (e.g., source, gate, or drain contact) comprises a metal layer or contact of the capacitor (22). In these embodiments, one or more processing steps required to form a conventional capacitor (12) are obviated by exploiting one or more processing steps already performed in fabrication of the HEMT (10).

公开(公告)号：WO2021123382A1

公开(公告)日：2021-06-24

申请号：PCT/EP2020/087322

申请日：2020-12-18

Applicant: THALES

Inventor： JACQUET, Jean-Claude ,  ALTUNTAS, Philippe ,  DELAGE, Sylvain ,  PIOTROWICZ, Stéphane

IPC: H01L29/778 ,  H01L29/40 ,  H01L29/417 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H01L29/7786

Abstract: L'invention concerne un transistor à effet de champ à haute mobilité (100) comprenant: - un empilement (10) selon un axe Z déposé sur un substrat (11) et comprenant une couche tampon (12), une couche barrière (13), une hétérojonction (15) entre ladite couche tampon (12) et ladite couche barrière (13) et un gaz bidimensionnel d'électrons (9) localisé dans un plan XY perpendiculaire à l'axe Z et au voisinage de l'hétérojonction (15), - une source (S), un drain (D), et une grille (G) déposée sur une face supérieure (14) de la couche barrière (13) entre la source et le drain, - une première couche diélectrique (PL1) présentant une permittivité relative εr et épaisseur e telles que : 0.5 nm ≤ e/εr≤ 2 nm, - un plot (PM) métallique disposé entre la grille (G) et le drain (D) et déposé sur la première couche diélectrique (PL1), le plot métallique étant connecté électriquement à la grille.

公开(公告)号：WO2023060219A1

公开(公告)日：2023-04-13

申请号：PCT/US2022/077731

申请日：2022-10-07

Applicant: EFFICIENT POWER CONVERSION CORPORATION

Inventor： LIAO, Wen-Chia ,  CAO, Jianjun ,  BEACH, Robert ,  TANG, Zhikai ,  LEE, Edward

IPC: H03K17/081 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/404 ,  H01L29/41758 ,  H01L29/66143 ,  H01L29/7786 ,  H03K17/08104 ,  H03K17/6871 ,  H03K2217/0009 ,  H03K2217/0018

Abstract: A bidirectional GaN FET with a single gate formed by integrating a single-gate bidirectional GaN FET in parallel with a bidirectional device formed of two back-to-back GaN FETs with a common source. The single-gate bidirectional GaN FET occupies most of the integrated circuit die, such that the integrated device has a low channel resistance, while also capturing the advantages of a back-to-back bidirectional GaN FET device.

公开(公告)号：WO2022269366A1

公开(公告)日：2022-12-29

申请号：PCT/IB2022/051821

申请日：2022-03-02

Applicant: MARVELL ASIA PTE LTD

Inventor： CHEN, Ricky Yuan

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/402 ,  H01L29/404 ,  H01L29/7835

Abstract: A network device (20) includes one or more circuit components (28, 56, 64, 68, 76, 84). The circuit components include a semiconductor substrate (24), a first device terminal (32) and a second device terminal (40), a drift region (44), and a mobility modulator (52). Both device terminals are coupled to the substrate, the second device terminal being spatially separated from the first device terminal. The drift region is disposed on the substrate between the first device terminal and the second device terminal, the drift region being configured to allow a flow of charge-carriers between the first device terminal and the second device terminal. The mobility modulator is coupled to the drift region and is configured to apply a field across the drift region responsive to one or more modulation signals, so as to modulate a mobility of charge-carriers as a function of longitudinal position along the drift region.

公开(公告)号：WO2022000269A1

公开(公告)日：2022-01-06

申请号：PCT/CN2020/099284

申请日：2020-06-30

Applicant: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.

Inventor： LI, Hao ,  ZHANG, Anbang ,  WANG, Jian ,  ZHENG, Haoning

IPC: H01L29/778 ,  H01L23/4824 ,  H01L23/485 ,  H01L29/2003 ,  H01L29/402 ,  H01L29/41758 ,  H01L29/42312 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7786

Abstract: A semiconductor device and a fabrication method thereof. The semiconductor device includes a III-nitride layer (110), a gate (120), a connection structure (130), and a gate bus (140). The gate (120) is disposed over the III-nitride layer (110). The connection structure (130) is disposed over the gate (120). The gate bus (140) extends substantially in parallel to the gate (120) and disposed over the connection structure (130) from a top view perspective. The gate bus (140) is electrically connected to the gate (120) through the connection structure (130).

公开(公告)号：WO2022008977A1

公开(公告)日：2022-01-13

申请号：PCT/IB2021/000513

申请日：2021-07-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： CHUANG, Ming-Yeh

IPC: H01L21/335 ,  H01L29/78 ,  H01L21/31111 ,  H01L21/32133 ,  H01L21/765 ,  H01L29/063 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/408 ,  H01L29/42368 ,  H01L29/66681 ,  H01L29/66795 ,  H01L29/7816 ,  H01L29/7851

Abstract: An integrated circuit (IC) having a fin field effect transistor (FinFET) includes a substrate (202) with a fin (204) extending from a surface of the substrate (202). The fin (204) includes a source region (408), a drain region (406), a drift region (402), and field plating oxide layer (602). The drift region (402) is adjacent the drain region (406). The field plating oxide layer (602) is on a first side, a second side, and a third side of the drift region (402).

公开(公告)号：WO2022000403A1

公开(公告)日：2022-01-06

申请号：PCT/CN2020/099871

申请日：2020-07-02

Applicant: INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD.

Inventor： CHOU, Yi-Lun

IPC: H01L29/778 ,  H01L21/335 ,  H01L21/22 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/402 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787

Abstract: A semiconductor device structure includes a substrate, a channel layer, a barrier layer and a doped group III-V layer. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The doped group III-V layer is disposed on the barrier layer. The doped group III-V layer includes a first portion and a second portion. The first portion has a first concentration of a first element. The second portion is adjacent to the first portion and has a second concentration of the first element. The gate structure is disposed on the first portion of the doped group III-V layer. The first concentration of the first element is different from the second concentration of the first element.