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公开(公告)号:WO2022236712A1
公开(公告)日:2022-11-17
申请号:PCT/CN2021/093141
申请日:2021-05-11
发明人: CAO, Kai , ZHANG, Jianping , ZHANG, Lei , YAO, Weigang , ZHOU, Chunhua
IPC分类号: H01L23/538 , H01L21/768 , H01L21/76224 , H01L21/823475 , H01L21/823481 , H01L23/5283 , H01L23/53295 , H01L27/085 , H01L29/2003 , H01L29/66462 , H01L29/778 , H01L29/7786
摘要: An integrated semiconductor device includes a substrate, semiconductor circuit layers, a first insulating layer, a second insulating layer, and an interconnection layer. The semiconductor circuit layers are disposed above the substrate. The semiconductor circuit layers have device portions and isolating portions, and the isolating portions are located among the device portions. The first insulating layer is disposed on the semiconductor circuit layers, and the second insulating layer is disposed on the first insulating layer, and the interconnection layer is disposed on the semiconductor circuit layers. The interconnection layer penetrates the first and second insulating layers to electrically connect the device portions of the semiconductor circuit layers. The second insulating layer or the first and second insulating layers collectively form one or more isolating structures above the isolating portion of the semiconductor circuit layers. The interconnection layer has a plurality of first circuits located above the device portions.
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公开(公告)号:WO2022173571A8
公开(公告)日:2022-08-18
申请号:PCT/US2022/013085
申请日:2022-01-20
申请人: WOLFSPEED, INC.
发明人: SRIRAM, Saptharishi , GUO, Jia
IPC分类号: H01L29/778 , H01L29/0623 , H01L29/1075 , H01L29/2003 , H01L29/404 , H01L29/41758 , H01L29/42316 , H01L29/66462 , H01L29/7786
摘要: An apparatus to address gate lag effect and/or other negative performance includes a substrate; a group III-Nitride buffer layer on the substrate; a group III-Nitride barrier layer on the group III-Nitride buffer layer, the group III-Nitride barrier layer may include a higher bandgap than a bandgap of the group III-Nitride buffer layer; a source electrically coupled to the group III-Nitride barrier layer; a gate electrically coupled to the group III-Nitride barrier layer; a drain electrically coupled to the group III-Nitride barrier layer; and a p-region being arranged at least in the substrate. In particular, the p-region extends toward a source side of the substrate; and the p-region extends toward a drain side of the substrate.
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公开(公告)号:WO2022056138A2
公开(公告)日:2022-03-17
申请号:PCT/US2021/049679
申请日:2021-09-09
申请人: RAYTHEON COMPANY
IPC分类号: H03H9/05 , H03H3/02 , H03H9/17 , H03H9/56 , H03H3/04 , H01L29/20 , H01L29/778 , H01L21/02378 , H01L21/0254 , H01L27/20 , H01L29/2003 , H01L29/201 , H01L29/205 , H01L29/4175 , H01L29/66462 , H01L29/7786 , H03F2200/294 , H03F2200/451 , H03F3/195 , H03H2003/023 , H03H2003/0442 , H03H9/0542 , H03H9/174 , H03H9/545 , H03H9/562 , H03H9/564 , H03H9/568 , H04B1/06 , H04B1/10
摘要: Embodiments of a single-chip ScAIN tunable filter bank include a plurality of switching elements, and a plurality of channel filters integrated on a monolithic platform. The monolithic platform comprises a single crystal base (202) and each of the switching elements comprises at least one of a scandium aluminum nitride (ScAIN) or other Group Ill-Nitride transistor structure (204) fabricated on the single crystal base (202). In these embodiments, each channel filter comprises a multi-layered ScAIN structure (206) comprising one or more a single-crystal epitaxial ScAIN layers fabricated on the single crystal base (202). The ScAIN layers for each channel filter are based on desired frequency characteristics of an associated one of the RF channels.
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公开(公告)号:WO2021202674A2
公开(公告)日:2021-10-07
申请号:PCT/US2021/025102
申请日:2021-03-31
申请人: CREE, INC.
发明人: NOORI, Basim , MARBELL, Marvin , SHEPPARD, Scott , LIM, Kwangmo Chris , KOMPOSCH, Alexander , MU, Qianli
IPC分类号: H01L23/66 , H01L23/36 , H01L23/498 , H01L23/522 , H01L23/482 , H01L23/057 , H01L23/495 , H01L2223/6616 , H01L2223/6644 , H01L2223/6655 , H01L2224/16227 , H01L2224/214 , H01L23/047 , H01L23/13 , H01L23/142 , H01L23/3121 , H01L23/4334 , H01L23/4824 , H01L23/49531 , H01L24/19 , H01L24/20 , H01L29/2003 , H01L29/4175 , H01L29/41758 , H01L29/7786 , H01L2924/1033 , H01L2924/13064 , H01L2924/1421 , H03F1/0288 , H03F2200/451 , H03F3/195
摘要: A transistor amplifier includes a semiconductor layer structure comprising first and second major surfaces and a plurality of unit cell transistors on the first major surface that are electrically connected in parallel, each unit cell transistor comprising a gate finger coupled to a gate manifold, a drain finger coupled to a drain manifold, and a source finger. The semiconductor layer structure is free of a via to the source fingers on the second major surface.
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公开(公告)号:WO2021144385A1
公开(公告)日:2021-07-22
申请号:PCT/EP2021/050734
申请日:2021-01-14
IPC分类号: G01K7/02 , H01L29/778 , H01L23/38 , H01L35/32 , H01L27/06 , H01L29/20 , G01K7/028 , H01L27/0617 , H01L29/2003 , H01L29/7786
摘要: Capteur thermoélectrique multicouche (350), pour générer un courant électrique sous l'effet d'un échauffement, le capteur thermoélectrique comportant un support (10) et un couple thermoélectrique (300a-b) porté par le support et comportant: - un premier organe thermoélectrique (70a-b) comportant au moins une portion d'un bicouche (28) dont les couches sont en des matériaux différents, et - un deuxième organe thermoélectrique (155a-b) comportant un matériau semi-conducteur dopé p et/ou un métal thermoélectrique, le couple thermoélectrique étant configuré pour générer un gaz d'électrons à l'interface (75a-b) entre les couches du bicouche, lors de l'échauffement du capteur thermoélectrique.
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公开(公告)号:WO2022271618A1
公开(公告)日:2022-12-29
申请号:PCT/US2022/034222
申请日:2022-06-21
申请人: ENPHASE ENERGY, INC.
IPC分类号: H02M7/797 , H02M7/48 , H02M7/217 , H01L29/778 , H01L29/66 , H01L29/2003 , H01L29/205 , H01L29/7786 , H02M5/293 , H02M7/4815 , H02M7/5387
摘要: A switched mode power converter is provided herein and comprises a cycloconverter comprising a plurality of switches, wherein each switch of the plurality of switches is a native four quadrant bi-directional switch with a common drift region configured to allow current flow in a first direction from a first source terminal to second source terminal and in a second direction from the second source terminal to the first direction.
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公开(公告)号:WO2022000403A1
公开(公告)日:2022-01-06
申请号:PCT/CN2020/099871
申请日:2020-07-02
发明人: CHOU, Yi-Lun
IPC分类号: H01L29/778 , H01L21/335 , H01L21/22 , H01L29/1066 , H01L29/2003 , H01L29/207 , H01L29/402 , H01L29/66462 , H01L29/7786 , H01L29/7787
摘要: A semiconductor device structure includes a substrate, a channel layer, a barrier layer and a doped group III-V layer. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The doped group III-V layer is disposed on the barrier layer. The doped group III-V layer includes a first portion and a second portion. The first portion has a first concentration of a first element. The second portion is adjacent to the first portion and has a second concentration of the first element. The gate structure is disposed on the first portion of the doped group III-V layer. The first concentration of the first element is different from the second concentration of the first element.
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公开(公告)号:WO2022000363A1
公开(公告)日:2022-01-06
申请号:PCT/CN2020/099697
申请日:2020-07-01
发明人: ZHANG, Anbang
IPC分类号: H01L29/778 , H01L23/60 , H01L27/02 , H01L27/0248 , H01L29/2003 , H01L29/66462 , H01L29/7786
摘要: An electronic device includes a substrate, a transistor and a doped well. The substrate includes a first region and a second region different from the first region. The transistor is disposed on the first region of the substrate. The transistor includes a first nitride semiconductor layer disposed on the substrate, and a second nitride semiconductor layer disposed on the first nitride semiconductor layer. The second nitride semiconductor layer has a bandgap greater than that of the first nitride semiconductor layer. The doped well is disposed in the second region.
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公开(公告)号:WO2021262317A2
公开(公告)日:2021-12-30
申请号:PCT/US2021/029942
申请日:2021-04-29
发明人: MA, Zhenqiang , ZHANG, Huilong , GONG, Shaoqin
IPC分类号: H01L23/367 , H01L29/66 , H01L29/778 , H01L23/522 , H01L23/3672 , H01L23/5226 , H01L29/2003 , H01L29/41708 , H01L29/66431 , H01L29/7371 , H01L29/7786
摘要: Flexible transistors and electronic circuits incorporating the transistors are provided. The flexible transistors promote heat dissipation from the active regions of the transistors while preserving their mechanical flexibility and high-frequency performance. The transistor designs utilize thru-substrate vias (TSVs) beneath the active regions of thin-film type transistors on thin flexible substrates. To promote rapid heat dissipation, the TSVs are coated with a material having a high thermal conductivity that transfers heat from the active region of the transistor to a large-area ground.
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公开(公告)号:WO2021255039A1
公开(公告)日:2021-12-23
申请号:PCT/EP2021/066138
申请日:2021-06-15
IPC分类号: H01L21/8252 , H01L27/06 , H01L27/085 , H01L29/06 , H01L29/10 , H01L29/417 , H01L29/778 , H01L29/66 , H01L29/207 , H01L29/861 , H01L27/0605 , H01L29/1066 , H01L29/1075 , H01L29/41766 , H01L29/66462 , H01L29/7786
摘要: L'invention concerne un dispositif (1) micro-électronique comprenant un premier (10) et un deuxième (20)composants électroniques, et un substrat (2), formé d'un premier matériau semi-conducteur, servant de support auxdits composants. Les premier et deuxième composants comprennent chacun une couche active (14, 24)formée au moins en partie d'un deuxième matériau semi-conducteur différent du premier matériau semi-conducteur. Le dispositif comprend en outre, pour chacun desdits composants, un empilement (100, 200) de maintien de tension électrique, qui est situé entre le substrat et la couche active du composant électronique considéré et qui comprend deux couches formant un jonction P-N, formée à partir du même matériau semi-conducteur que le substrat et qui isole la couche active en question d'avec le substrat. Les ensembles comprenant respectivement le premier et le deuxième composant et son empilement respectif de maintien de tension électrique sont séparés l'un de l'autre par une barrière (4) en matériau électriquement isolant (5). L'invention concerne aussi un procédé de fabrication associé.
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