Invention Grant
- Patent Title: System and method for facilitating efficient host memory access from a network interface controller (NIC)
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Application No.: US18454202Application Date: 2023-08-23
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Publication No.: US12132649B2Publication Date: 2024-10-29
- Inventor: Igor Gorodetsky , Hess M. Hodge , Timothy J. Johnson
- Applicant: Hewlett Packard Enterprise Development LP
- Applicant Address: US TX Spring
- Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee: Hewlett Packard Enterprise Development LP
- Current Assignee Address: US TX Spring
- Agency: Yao Legal Services, Inc.
- Main IPC: G06F13/24
- IPC: G06F13/24 ; G06F9/50 ; G06F9/54 ; G06F12/0862 ; G06F12/1036 ; G06F12/1045 ; G06F13/14 ; G06F13/16 ; G06F13/38 ; G06F13/40 ; G06F13/42 ; G06F15/173 ; H04L1/00 ; H04L43/0876 ; H04L43/10 ; H04L45/00 ; H04L45/021 ; H04L45/028 ; H04L45/12 ; H04L45/122 ; H04L45/125 ; H04L45/16 ; H04L45/24 ; H04L45/28 ; H04L45/42 ; H04L45/745 ; H04L45/7453 ; H04L47/10 ; H04L47/11 ; H04L47/12 ; H04L47/122 ; H04L47/20 ; H04L47/22 ; H04L47/24 ; H04L47/2441 ; H04L47/2466 ; H04L47/2483 ; H04L47/30 ; H04L47/32 ; H04L47/34 ; H04L47/52 ; H04L47/62 ; H04L47/625 ; H04L47/6275 ; H04L47/629 ; H04L47/76 ; H04L47/762 ; H04L47/78 ; H04L47/80 ; H04L49/00 ; H04L49/101 ; H04L49/15 ; H04L49/90 ; H04L49/9005 ; H04L49/9047 ; H04L67/1097 ; H04L69/22 ; H04L69/40 ; H04L69/28

Abstract:
A network interface controller (NIC) capable of efficient memory access is provided. The NIC can be equipped with an operation logic block, a signaling logic block, and a tracking logic block. The operation logic block can maintain an operation group associated with packets requesting an operation on a memory segment of a host device of the NIC. The signaling logic block can determine whether a packet associated with the operation group has arrived at or departed from the NIC. Furthermore, the tracking logic block can determine that a request for releasing the memory segment has been issued. The tracking logic block can then determine whether at least one packet associated with the operation group is under processing in the NIC. If no packet associated with the operation group is under processing in the NIC, tracking logic block can notify the host device that the memory segment can be released.
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