公开(公告)号：EP4199059A1

公开(公告)日：2023-06-21

申请号：EP22198962.7

申请日：2022-09-30

申请人： INTEL Corporation

发明人： DEWEY, Gilbert ,  HUANG, Cheng-Ying ,  THOMAS, Nicole ,  RADOSAVLJEVIC, Marko ,  MORROW, Patrick ,  AGRAWAL, Ashish ,  RACHMADY, Willy ,  HARATIPOUR, Nazila ,  SUNG, Seung Hoon ,  TUNG, I-Cheng ,  NEUMANN, Christopher ,  GANGULY, Koustav ,  RAFIQUE, Subrina

IPC分类号： H01L21/822 ,  H01L21/8238 ,  H01L27/06 ,  H01L29/06 ,  H01L29/775 ,  H01L29/786

摘要： Techniques are provided herein to form gate-all-around (GAA) semiconductor devices utilizing a metal fill in an epi region of a stacked transistor configuration. In one example, an n-channel device and the p-channel device may both be GAA transistors each having any number of nanoribbons extending in the same direction where the n-channel device is located vertically above the p-channel device (or vice versa). Source or drain regions are adjacent to both ends of the n-channel device and the p-channel device. A metal fill may be provided around the source or drain region of the bottom semiconductor device to provide a high contact area between the highly conductive metal fill and the epitaxial material of that source or drain region. Metal fill may also be used around the top source or drain region to further improve conductivity throughout both of the stacked source or drain regions.

公开(公告)号：EP4156283A1

公开(公告)日：2023-03-29

申请号：EP22191316.3

申请日：2022-08-19

申请人： INTEL Corporation

发明人： GHANI, Tahir ,  MURTHY, Anand ,  DEWEY, Gilbert ,  KOBRINSKY, Mauro ,  BOMBERGER, Cory ,  HARATIPOUR, Nazila ,  NANDI, Debaleena ,  SHAH, Rushabh

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/66 ,  H01L29/775 ,  H01L29/45 ,  B82Y10/00 ,  H01L29/36

摘要： PMOS gate-all-around integrated circuit structures having confined p-type epitaxial source or drain structures, are described. For example, an integrated circuit structure includes a plurality of nanowires above a sub-fin. A gate stack is over the plurality of nanowires and the sub-fin. P-type epitaxial source or drain structures (358, 359, 360, 364, 366) are on opposite ends of the plurality of nanowires. The epitaxial source or drain structures comprise i) a first PMOS epitaxial (pEPI) region of germanium and boron (358), ii) a second pEPI region of silicon, germanium and boron (359) on the first pEPI region at a contact location, iii) a capping layer comprising silicon (360) over the second pEPI region. A conductive contact material (366) comprising titanium is on the capping layer.The resulting source or drain structure exhibits an ultra-low contact resistance and is thermally stable. Preferably the B-11 boron isotope is used in the source or drain structure.

公开(公告)号：EP4109553A1

公开(公告)日：2022-12-28

申请号：EP22180459.4

申请日：2022-06-22

申请人： INTEL Corporation

发明人： NANDI, Debaleena ,  BOMBERGER, Cory ,  DEWEY, Gilbert ,  MURTHY, Anand S. ,  KOBRINSKY, Mauro ,  SHAH, Rushabh ,  CHOI, Chi-Hing ,  KENNEL, Harold W. ,  SAADAT, Omair ,  ONI, Adedapo ,  HARATIPOUR, Nazila ,  GHANI, Tahir

IPC分类号： H01L29/417 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

摘要： Embodiments disclosed herein include semiconductor devices with improved contact resistances. In an embodiment, a semiconductor device comprises a semiconductor channel, a gate stack over the semiconductor channel, a source region on a first end of the semiconductor channel, a drain region on a second end of the semiconductor channel, and contacts over the source region and the drain region. In an embodiment, the contacts comprise a silicon germanium layer, an interface layer over the silicon germanium layer, and a titanium layer over the interface layer.

公开(公告)号：EP4020561A1

公开(公告)日：2022-06-29

申请号：EP21195965.5

申请日：2021-09-10

申请人： INTEL Corporation

发明人： HARATIPOUR, Nazila ,  Chang, Sou-Chi ,  Shivaraman, Shriram ,  AVCI, Uygar E. ,  KAVALIEROS, Jack

IPC分类号： H01L27/11514 ,  G11C11/22 ,  H01L27/11507 ,  H01L49/02

摘要： A memory device (200) comprises an access transistor (206) comprising a bitline (208) and a wordline (210). A series of alternating plate lines (216) and an insulating material (218) is over the access transistor, the plate lines comprising an adhesion material (250) on a top and a bottom thereof and a metal material (252) in between the adhesion material, the metal material having one or more voids (254) therein. Two or more ferroelectric capacitors (202) is over the access transistor and through the series of alternating plate lines and an insulating material such that a first one of the ferroelectric capacitors is coupled to a first one of the plate lines and a second one of the ferroelectric capacitors is coupled to a second one of the plate lines, and wherein the two or more ferroelectric capacitors are each coupled to and controlled by the access transistor. A plurality of vias (226) each land on a respective one of the plate lines, wherein the plurality of vias comprises a same metal material as the plate lines.

公开(公告)号：EP4020560A1

公开(公告)日：2022-06-29

申请号：EP21209149.0

申请日：2021-11-18

申请人： INTEL Corporation

发明人： SHIVARAMAN, Shriram ,  AVCI, Uygar E. ,  PENUMATCHA, Ashish Verma ,  HARATIPOUR, Nazila ,  SUNG, Seung Hoon ,  CHANG, Sou-Chi

IPC分类号： H01L27/11507 ,  H01L21/28 ,  H01L29/51 ,  H01L29/66

摘要： A memory device structure includes a transistor structure including a gate electrode over a top surface of a fin and adjacent to a sidewall of the fin, a source structure coupled to a first region of the fin and a drain structure coupled to a second region of the fin, where the gate electrode is between the first and the second region. Agate dielectric layer is between the fin and the gate electrode. The memory device structure further includes a capacitor coupled with the transistor structure, the capacitor includes the gate electrode, a ferroelectric layer on a substantially planar uppermost surface of the gate electrode and a word line on the ferroelectric layer.

公开(公告)号：EP3857463A1

公开(公告)日：2021-08-04

申请号：EP19866783.4

申请日：2019-08-22

申请人： Intel Corporation

发明人： SHARMA, Abhishek ,  KAVALIEROS, Jack T. ,  YOUNG, Ian A. ,  KRISHNAMURTHY, Ram ,  MANIPATRUNI, Sasikanth ,  AVCI, Uygar ,  CHEN, Gregory K. ,  MATHURIYA, Amrita ,  KUMAR, Raghavan ,  KNAG, Phil ,  SUMBUL, Huseyin Ekin ,  HARATIPOUR, Nazila ,  LE, Van H.

IPC分类号： G06N3/063 ,  H01L27/108 ,  G11C11/409 ,  H01L27/11502 ,  G06N3/04 ,  G06F17/16 ,  H01L27/11