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公开(公告)号：EP1160845A3
公开(公告)日：2002-11-27
申请号：EP01112273.6
申请日：2001-05-18
IPC分类号： H01L21/265 , H01L21/329 , H01L21/336 , H01L21/331
CPC分类号： H01L29/6606 , H01L21/046 , H01L21/0475 , H01L29/66068 , H01L29/66242
摘要： A method for fabricating a semiconductor device that includes a semiconductor layer, containing Si and C, for its active region. Ions of a dopant are implanted into an SiC substrate a number of times, thereby forming a doped layer with multiple dopant concentration peaks in the substrate. Thereafter, the substrate is placed and annealed in a chamber with an etching gas (e.g., hydrogen gas) supplied thereto. In this manner, while the substrate is being annealed, the upper part of the doped layer is removed with the lower part thereof left. Accordingly, the dopant concentration at the surface of the lower doped layer can be easily controlled to such a value as required for forming a Schottky or ohmic electrode thereon. In addition, the upper doped layer with a lot of defects is removed, and therefore the surface region of the substrate can have its crystallinity improved.
摘要翻译： 一种用于制造半导体器件的方法，该半导体器件包括用于其有源区域的含有Si和C的半导体层。 将掺杂剂的离子注入SiC衬底中多次，从而在衬底中形成具有多个掺杂剂浓度峰的掺杂层。 此后，将衬底放置并在其中提供有蚀刻气体（例如氢气）的室中退火。 以这种方式，当衬底正在退火时，掺杂层的上部被剩下的部分去除。 因此，可以容易地将下掺杂层的表面处的掺杂剂浓度控制为在其上形成肖特基或欧姆电极所需的值。 此外，去除了具有大量缺陷的上掺杂层，因此衬底的表面区域可以提高其结晶度。
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12.发明公开Semiconductor device and method for fabricating the same 审中-公开Halbleitervorrichtung und Verfahren zu ihrer Herstellung
公开(公告)号：EP1255281A2
公开(公告)日：2002-11-06
申请号：EP02009601.2
申请日：2002-04-26
发明人： Takahashi, Kunimasa , Yokogawa, Toshiya , Kitabatake, Makoto , Uchida, Masao , Kusumoto, Osamu , Yamashita, Kenya
CPC分类号： H01L29/7813 , C30B25/02 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02529 , H01L29/0878 , H01L29/1029 , H01L29/105 , H01L29/1075 , H01L29/1608 , H01L29/365 , H01L29/6606 , H01L29/66068 , H01L29/812 , H01L29/872
摘要： A suppression layer is formed on a SiC substrate in accordance with a CVD method which alternately repeats the step of epitaxially growing an undoped layer which is a SiC layer into which an impurity is not introduced and the step of epitaxially growing an impurity doped layer which is a SiC layer into which nitrogen is introduced pulsatively. A sharp concentration profile of nitrogen in the suppression layer prevents the extension of micropipes. A semiconductor device properly using the high breakdown voltage and high-temperature operability of SiC can be formed by depositing SiC layers forming an active region on the suppression layer.
摘要翻译： 根据CVD方法，在SiC衬底上形成抑制层，该方法交替重复外延生长未引入杂质的SiC层的未掺杂层的步骤和外延生长杂质掺杂层的步骤 其中氮脉冲地引入其中的SiC层。 抑制层中氮的浓度曲线锐利，防止了微管的延伸。 可以通过在抑制层上沉积形成有源区的SiC层来形成适当地使用SiC的高击穿电压和高温可操作性的半导体器件。
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13.发明公开Method for growing semiconductor film by pulsed chemical vapour deposition 审中-公开Verfahren zum Aufwachsen eines Hableiterfilms mittels gepulster Dampfphasenabscheidung
公开(公告)号：EP1039512A2
公开(公告)日：2000-09-27
申请号：EP00105710.8
申请日：2000-03-17
IPC分类号： H01L21/20
CPC分类号： H01L29/66068 , C30B25/02 , C30B25/14 , C30B29/52 , H01L21/0237 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/02634 , H01L21/02658 , H01L21/0455 , H01L29/365 , H01L29/66431
摘要： In a chamber, a substrate is mounted on a susceptor and then heated to an elevated temperature. Source and diluting gases are supplied into the chamber through source and diluting gas supply pipes provided with respective flow meters. In addition, a doping gas is also supplied through an additive gas supply pipe, which is provided with a pulse valve, and a gas inlet pipe into the chamber by repeatedly opening and closing the pulse valve. In this manner, a doped layer is grown epitaxially on the substrate. In this case, a pulsed flow of the doping gas is directly supplied through the pulse valve onto the substrate from the outlet port of a pressure reducer for a doping gas cylinder. As a result, a steeply rising dopant concentration profile appears in a transition region between the substrate and the doped layer, and the surface of the doped layer is planarized.
摘要翻译： 在室中，将基板安装在基座上，然后加热到升高的温度。 源和稀释气体通过源和稀释供应有相应流量计的气体供应管道供应到室中。 此外，通过反复打开和关闭脉冲阀，通过设置有脉冲阀的添加剂气体供给管和进入管中的气体导入管也供给掺杂气体。 以这种方式，在衬底上外延生长掺杂层。 在这种情况下，掺杂气体的脉冲流通过脉冲阀从用于掺杂气体筒的减压器的出口直接供给到基板上。 结果，在衬底和掺杂层之间的过渡区域中出现急剧上升的掺杂剂浓度分布，并且掺杂层的表面被平坦化。
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公开(公告)号：EP1968104A3
公开(公告)日：2008-11-05
申请号：EP08011174.3
申请日：2003-07-09
发明人： Kusumoto, Osamu , Kitabatake, Makoto , Takahashi, Kunimasa , Yamashita, Kenya c/o Matsushita Electric Industrial Co., Ltd , Miyanaga, Ryoko , Uchida, Masao
IPC分类号： H01L21/28 , H01L29/78 , H01L21/336 , H01L21/82 , H01L29/872 , H01L29/812 , H01L29/45 , H01L27/06 , H01L29/772
CPC分类号： H01L29/7813 , H01L21/0485 , H01L21/8213 , H01L27/0605 , H01L27/0629 , H01L29/1029 , H01L29/105 , H01L29/1608 , H01L29/365 , H01L29/41766 , H01L29/66068 , H01L29/7725 , H01L29/7828 , H01L29/7838 , H01L29/812 , H01L29/872 , Y10S438/931
摘要： An accumulation-mode MISFET comprises: a high-resistance SiC layer 102 epitaxially grown on a SiC substrate 101; a well region 103; an accumulation channel layer 104 having a multiple δ-doped layer formed on the surface region of the well region 103; a contact region 105; a gate insulating film 108; and a gate electrode 110. The accumulation channel layer 104 has a structure in which undoped layers 104b and δ-doped layers 104a allowing spreading movement of carriers to the undoped layers 104b under a quantum effect are alternately stacked. A source electrode 111 is provided which enters into the accumulation channel layer 104 and the contact region 105 to come into direct contact with the contact region 105. It becomes unnecessary that a source region is formed by ion implantation, leading to reduction in fabrication cost.
摘要翻译： 累积模式MISFET包括：在SiC衬底101上外延生长的高电阻SiC层102; 井区域103; 具有在阱区103的表面区域上形成的多个δ掺杂层的累积沟道层104; 接触区域105; 栅极绝缘膜108; 和栅极电极110.积聚沟道层104具有这样的结构，其中交替堆叠允许载流子在量子效应下扩散到未掺杂层104b的运动的未掺杂层104b和δ掺杂层104a。 提供源电极111，其进入到积累沟道层104和接触区域105中以与接触区域105直接接触。不需要通过离子注入形成源区域，从而导致制造成本的降低。
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公开(公告)号：EP1255281A3
公开(公告)日：2008-08-06
申请号：EP02009601.2
申请日：2002-04-26
发明人： Takahashi, Kunimasa , Yokogawa, Toshiya , Kitabatake, Makoto , Uchida, Masao , Kusumoto, Osamu , Yamashita, Kenya
CPC分类号： H01L29/7813 , C30B25/02 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02529 , H01L29/0878 , H01L29/1029 , H01L29/105 , H01L29/1075 , H01L29/1608 , H01L29/365 , H01L29/6606 , H01L29/66068 , H01L29/812 , H01L29/872
摘要： A suppression layer is formed on a SiC substrate in accordance with a CVD method which alternately repeats the step of epitaxially growing an undoped layer which is a SiC layer into which an impurity is not introduced and the step of epitaxially growing an impurity doped layer which is a SiC layer into which nitrogen is introduced pulsatively. A sharp concentration profile of nitrogen in the suppression layer prevents the extension of micropipes. A semiconductor device properly using the high breakdown voltage and high-temperature operability of SiC can be formed by depositing SiC layers forming an active region on the suppression layer.
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公开(公告)号：EP1032048B1
公开(公告)日：2008-05-28
申请号：EP00103360.4
申请日：2000-02-22
IPC分类号： H01L29/78 , H01L21/336 , H01L21/04 , H01L29/423 , H01L21/265
CPC分类号： H01L29/7813 , H01L21/049 , H01L29/66068
摘要： An insulated-gate semiconductor element having a high breakdown voltage is provided. The surface of a silicon carbide substrate is etched to form a concave portion. A particle beam, for example an ion beam, is irradiated from above, and a defect layer is formed at least in a bottom surface of the concave portion. The substrate is heated in an oxidation atmosphere, and an oxide film is formed at least on a side surface and the bottom surface of the concave portion. A gate electrode is formed on the oxide film. The oxide film at the bottom surface is thicker than at the side surfaces, so that a high breakdown voltage can be ensured, even when the surface of the silicon carbide layer is a face with which a superior epitaxial layer can be attained, such as the (111) Si-face of beta -SiC or the (0001) Si-face of alpha -SiC.
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17.发明公开Silicon carbide-oxide layered structure, production method thereof, and semiconductor device 有权Siliziumkarbidoxid层结构，制造方法及半导体装置
公开(公告)号：EP1523032A3
公开(公告)日：2007-09-26
申请号：EP04023713.3
申请日：2004-10-05
发明人： Yamashita, Kenya , Kitabatake, Makoto , Kusumoto, Osamu , Takahashi, Kunimasa , Uchida, Masao , Miyanaga, Ryoko
IPC分类号： H01L21/04
CPC分类号： H01L29/518 , H01L21/049 , H01L29/1608 , H01L29/41766 , H01L29/513 , H01L29/66068 , H01L29/7827 , H01L29/7828
摘要： A gate insulating film which is an oxide layer mainly made of SiO 2 is formed over a silicon carbide substrate by thermal oxidation, and then, a resultant structure is annealed in an inert gas atmosphere in a chamber. Thereafter, the silicon carbide-oxide layered structure is placed in a chamber which has a vacuum pump and exposed to a reduced pressure NO gas atmosphere at a high temperature higher than 1100°C and lower than 1250°C, whereby nitrogen is diffused in the gate insulating film. As a result, a gate insulating film which is a V-group element containing oxide layer, the lower part of which includes a high nitrogen concentration region, and the relative dielectric constant of which is 3.0 or higher, is obtained. The interface state density of an interface region between the V-group element containing oxide layer and the silicon carbide layer decreases.
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18.发明公开Method for growing semiconductor film by pulsed chemical vapour deposition 审中-公开采用脉冲蒸镀生长Hableiterfilms的方法
公开(公告)号：EP1039512A3
公开(公告)日：2003-11-05
申请号：EP00105710.8
申请日：2000-03-17
CPC分类号： H01L29/66068 , C30B25/02 , C30B25/14 , C30B29/52 , H01L21/0237 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/02634 , H01L21/02658 , H01L21/0455 , H01L29/365 , H01L29/66431
摘要： In a chamber, a substrate is mounted on a susceptor and then heated to an elevated temperature. Source and diluting gases are supplied into the chamber through source and diluting gas supply pipes provided with respective flow meters. In addition, a doping gas is also supplied through an additive gas supply pipe, which is provided with a pulse valve, and a gas inlet pipe into the chamber by repeatedly opening and closing the pulse valve. In this manner, a doped layer is grown epitaxially on the substrate. In this case, a pulsed flow of the doping gas is directly supplied through the pulse valve onto the substrate from the outlet port of a pressure reducer for a doping gas cylinder. As a result, a steeply rising dopant concentration profile appears in a transition region between the substrate and the doped layer, and the surface of the doped layer is planarized.
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19.发明公开Semiconductor substrate and device comprising SiC and method for fabricating the same 审中-公开Halbleitersubstrat und-bauelement aus SiC und Verfahren zu deren Herstellung
公开(公告)号：EP1306890A2
公开(公告)日：2003-05-02
申请号：EP02023730.1
申请日：2002-10-23
发明人： Takahashi, Kunimasa , Uchida, Masao , Kitabatake, Makoto , Yokogawa, Toshiya , Kusumoto, Osamu , Yamashita, Kenya , Miyanaga, Ryoko
IPC分类号： H01L21/04
CPC分类号： H01L29/365 , C30B25/02 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L21/02579 , H01L21/02584 , H01L21/0262 , H01L21/02661 , H01L21/0445 , H01L29/0657 , H01L29/1608 , H01L29/66068
摘要： A SiC bulk substrate whose top face has been flattened is placed in a vertical thin film growth system to be annealed in an inert gas atmosphere. A material gas of Si is then supplied at a flow rate of 1 mL/min. at a substrate temperature of 1200°C through 1600°C. Subsequently, the diluent gas is changed to a hydrogen gas at a temperature of 1600°C, and material gases of Si and carbon are supplied with nitrogen intermittently supplied, so as to deposit SiC thin films on the SiC bulk substrate. In a flat δ -doped multilayered structure thus formed, an average height of macro steps formed on the top face and on interfaces therein is 30 nm or less. When the resultant substrate is used, a semiconductor device with a high breakdown voltage and high mobility can be realized.
摘要翻译： 将其顶面平坦化的SiC体基板放置在垂直薄膜生长系统中，以在惰性气体气氛中进行退火。 然后以1mL / min的流速供给Si的原料气体。 在1200℃〜1600℃的基板温度下，在1600℃的温度下将稀释气体变为氢气，向间歇地供给氮气的Si和碳的原料气体供给，以沉积 在SiC体基板上的SiC薄膜。 在如此形成的平坦的三角形多层结构的结构中，形成在顶面上和其界面上的宏步骤的平均高度为30nm或更小。 当使用所得到的衬底时，可以实现具有高击穿电压和高迁移率的半导体器件。
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20.发明公开Equipment for communication system and semiconductor integrated circuit device 有权Ausstattung eines Kommunikationssystems
公开(公告)号：EP1209740A2
公开(公告)日：2002-05-29
申请号：EP01127726.6
申请日：2001-11-21
CPC分类号： H03F3/601 , H01L21/8213 , H01L27/0605 , H01L29/105 , H01L29/157 , H01L29/1608 , H01L29/365 , H01L29/7725 , H01L29/812 , H01L29/872 , H03D7/125 , H03F2200/294
摘要： Equipment for a communication system has a semiconductor device formed by integrating a Schottky diode, a MOSFET, a capacitor, and an inductor in a SiC substrate. The SiC substrate has a first multilayer portion and a second multilayer portion provided upwardly in this order. The first multilayer portion is composed of δ-doped layers each containing an n-type impurity (nitrogen) at a high concentration and undoped layers which are alternately stacked. The second multilayer portion is composed of δ - doped layers each containing a p-type impurity (aluminum) at a high concentration and undoped layers which are alternately stacked. Carriers in the δ -doped layers spread out extensively to the undoped layers. Because of a low impurity concentration in each of the undoped layers, scattering by impurity ions is reduced so that a low resistance and a high breakdown voltage are obtained.
摘要翻译： 用于通信系统的设备具有通过将肖特基二极管，MOSFET，电容器和电感器集成在SiC衬底中而形成的半导体器件。 SiC衬底具有依次向上设置的第一多层部分和第二多层部分。 第一多层部分由各自含有高浓度的n型杂质（氮）和交替层叠的未掺杂层的'掺杂层组成。 第二多层部分由各自含有高浓度的p型杂质（铝）和交替层叠的未掺杂层的'掺杂层构成。 '覆盖层中的载体广泛扩展到未掺杂的层。 由于每个未掺杂层中的杂质浓度低，所以杂质离子的散射减小，从而获得低的电阻和高的击穿电压。
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