公开(公告)号：EP2939240A1

公开(公告)日：2015-11-04

申请号：EP13818158.1

申请日：2013-12-20

申请人： Qualcomm Incorporated

发明人： TERZIOGLU, Esin ,  DESAI, Nishith ,  VATTIKONDA, Rakesh ,  JUNG, ChangHo ,  YOON, Sei Seung

IPC分类号： G11C15/04

CPC分类号： G11C15/04 ,  G11C15/00 ,  G11C15/043 ,  G11C15/046

摘要： A static, ternary content addressable memory (TCAM) includes a key cell and a mask cell coupled to intermediate match lines. The key cell is coupled to a first pull-down transistor and a first pull-up transistor. The mask cell is coupled to a second pull-down transistor and a second pull-up transistor. The first pull-down transistor and second pull-down transistor are connected in parallel and the first pull-up transistor and second pull-up transistor are connected in series. A match line output is also coupled to the first pull-down transistor and second pull-down transistor and further coupled to the first pull-up transistor and second pull-up transistor.

公开(公告)号：EP2130206B1

公开(公告)日：2014-07-09

申请号：EP08743709.1

申请日：2008-03-06

申请人： QUALCOMM Incorporated

发明人： YOON, Sei Seung ,  KANG, Seung H. ,  SANI, Mehdi Hamidi

IPC分类号： G11C7/06 ,  G11C11/16

CPC分类号： G11C7/02 ,  G11C7/062 ,  G11C7/067 ,  G11C7/12 ,  G11C11/1673

公开(公告)号：EP2353164A1

公开(公告)日：2011-08-10

申请号：EP09748663.3

申请日：2009-11-04

申请人： QUALCOMM Incorporated

发明人： YOON, Sei Seung ,  SANI, Mehdi Hamidi ,  KANG, Seung H.

IPC分类号： G11C11/16

CPC分类号： G11C8/08 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675

摘要： Systems, circuits and methods for controlling the word line voltage applied to word line transistors (410) in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. One embodiment is directed to a STT-MRAM including a bit cell having a magnetic tunnel junction (MTJ, 405) and a word line transistor. The bit cell is coupled to a bit line (420) and a source line (440). A word line driver (432) is coupled to a gate of the word line transistor. The word line driver is configured to provide a word line voltage greater than a supply voltage below "a transition voltage of the supply voltage and to provide a voltage less than the supply voltage for supply voltages above the transition voltage.

摘要翻译： 公开了用于控制施加到自旋转移磁阻随机存取存储器（STT-MRAM）中的字线晶体管的字线电压的系统，电路和方法。 一个实施例涉及包括具有磁性隧道结（MTJ）的位单元和字线晶体管的STT-MRAM。 位单元耦合到位线和源极线。 字线驱动器耦合到字线晶体管的栅极。 字线驱动器被配置为提供大于低于电源电压的转换电压的电源电压的字线电压，并且为高于转换电压的电源电压提供小于电源电压的电压。

公开(公告)号：EP2342767A1

公开(公告)日：2011-07-13

申请号：EP09792722.2

申请日：2009-09-18

申请人： QUALCOMM Incorporated

发明人： KANG, Seung H. ,  YOON, Sei Seung

IPC分类号： H01L43/08

CPC分类号： G01R33/098 ,  H01L43/08

摘要： Exemplary embodiments of the invention are directed to magnetic elements including a passivation layer for isolation from other on-chip elements. One embodiment is directed to an apparatus comprising a magnetic tunnel junction (MTJ) element. The MTJ element comprises: a first ferromagnetic layer; a second ferromagnetic layer; an insulating layer disposed between the first and second ferromagnetic layers; and an MTJ passivation layer forming protective sidewalls disposed adjacent to the first ferromagnetic layer, the second ferromagnetic layer, and the insulating layer.

摘要翻译： 本发明的示例性实施例针对包括用于与其他片上元件隔离的钝化层的磁性元件。 一个实施例针对包括磁性隧道结（MTJ）元件的设备。 该MTJ元件包括：第一铁磁层; 第二铁磁层; 设置在第一和第二铁磁层之间的绝缘层; 以及形成与第一铁磁层，第二铁磁层和绝缘层相邻设置的保护侧壁的MTJ钝化层。

公开(公告)号：EP2137734A1

公开(公告)日：2009-12-30

申请号：EP08745261.1

申请日：2008-04-07

申请人： QUALCOMM Incorporated

发明人： JUNG, Seong-ook ,  SANI, Mehdi, Hamidi ,  KANG, Seung H. ,  YOON, Sei Seung

IPC分类号： G11C11/16

CPC分类号： G11C11/1675 ,  G11C11/1659 ,  G11C11/1673

摘要： Systems, circuits and methods for determining read and write voltages for a given word line transistor in Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) are disclosed. A first voltage can be supplied to the write operations so that the write operations occur in the saturation region (454) of the word line transistor. A second voltage, which is less than the first voltage, can be supplied for read operations so that the read operations occur in the linear region (452) of the word line transistor.

公开(公告)号：EP3036744B1

公开(公告)日：2020-08-05

申请号：EP14758473.4

申请日：2014-08-21

申请人： Qualcomm Incorporated

发明人： GULATI, Chirag ,  SINHA, Rakesh Kumar ,  CHABA, Ritu ,  YOON, Sei Seung

IPC分类号： G11C11/412 ,  G11C11/418 ,  G11C8/14 ,  G11C8/16 ,  G11C11/419

公开(公告)号：EP3411879B1

公开(公告)日：2020-01-01

申请号：EP17701773.8

申请日：2017-01-09

申请人： Qualcomm Incorporated

发明人： JUNG, Chulmin ,  AHMED, Fahad ,  YOON, Sei Seung ,  KIM, Keejong

IPC分类号： G11C29/02 ,  G11C29/50 ,  G11C29/14 ,  G11C7/02 ,  G11C11/419

公开(公告)号：EP3289589B1

公开(公告)日：2019-05-29

申请号：EP16717737.7

申请日：2016-03-29

申请人： Qualcomm Incorporated

发明人： AHMED, Fahad ,  JUNG, Chulmin ,  YOON, Sei Seung

IPC分类号： G11C7/06 ,  G11C7/08 ,  G11C11/419

公开(公告)号：EP3271919B1

公开(公告)日：2019-05-01

申请号：EP16714646.3

申请日：2016-03-16

申请人： Qualcomm Incorporated

发明人： JUNG, Chulmin ,  CHEN, Po-Hung ,  LI, David ,  YOON, Sei Seung

IPC分类号： G11C8/10 ,  G11C8/06 ,  G11C8/08 ,  G11C5/14

公开(公告)号：EP3195318B1

公开(公告)日：2018-04-18

申请号：EP15748352.0

申请日：2015-07-20

申请人： Qualcomm Incorporated

发明人： YOON, Sei Seung ,  KWOK, Tony Chung Yiu ,  JUNG, Changho ,  DESAI, Nishith Nitin

IPC分类号： G11C7/10 ,  G11C8/16

CPC分类号： G11C11/419 ,  G11C7/106 ,  G11C7/1072 ,  G11C7/1075 ,  G11C7/1087 ,  G11C7/22 ,  G11C7/222 ,  G11C8/16 ,  G11C11/412

摘要： A memory and a method for operating the memory provided. In one aspect, the memory may be a PDP memory. The memory includes a control circuit configured to generate a first clock and a second clock in response an edge of a clock for an access cycle. A first input circuit is configured to receive an input for a first memory access based on the first clock. The first input circuit includes a latch. The second input circuit configured to receive an input for a second memory access based on the second clock. The second input circuit includes a flip-flop.