公开(公告)号：EP2357672A1

公开(公告)日：2011-08-17

申请号：EP09827309.7

申请日：2009-11-02

申请人： Sharp Kabushiki Kaisha

发明人： FURUKAWA, Hiroaki

IPC分类号： H01L29/786 ,  H01L21/3065 ,  H01L21/336

CPC分类号： H01L27/12 ,  H01L21/0335 ,  H01L29/0657

摘要： A semiconductor layer ( 100 ) according to the present invention includes a top surface ( 100o ), a bottom surface ( 100u ) and a side surface ( 100s ). In a portion of the side surface ( 100s ) which is in the vicinity of a border with the top surface ( 100o ), a tangential line ( T1 ) to the portion is inclined with respect to the normal to the bottom surface ( 100u ). In a certain portion of the side surface ( 100s ) which is farther from the top surface ( 100o ) than the portion in the vicinity of the border, an angle made by a tangential line ( T2 ) to the certain portion and a plane defined by the bottom surface ( 100u ) is larger than an angle made by the tangential line ( T1 ) to the portion in the vicinity of the border and the plane defined by the bottom surface ( 100u ).

摘要翻译： 根据本发明的半导体层（100）包括顶表面（100o），底表面（100u）和侧表面（100s）。 在与顶表面（100o）接触的附近的侧表面（100s）的一部分中，该部分的切线（T1）相对于底表面（100u）的法线倾斜。 在比顶部表面（100o）远离边界附近的侧表面（100s）的某一部分中，由切线（T2）与特定部分形成的角度和由 底面（100u）大于由切线（T1）与边界附近的部分和由底面（100u）限定的平面所形成的角度。

公开(公告)号：EP2137754A1

公开(公告)日：2009-12-30

申请号：EP08733791.1

申请日：2008-04-10

申请人： BASF SE

发明人： BÜRGI, Lukas ,  PFEIFFER, Reto ,  WALTER, Harald ,  VON MÜHLENEN, Adrian

IPC分类号： H01L21/027 ,  H01L51/05 ,  H01L51/00 ,  H01L51/10 ,  H01L51/42

CPC分类号： H01L21/0272 ,  H01L21/0274 ,  H01L21/0335 ,  H01L51/0018 ,  H01L51/0037 ,  H01L51/0097 ,  H01L51/0512 ,  Y02E10/549

摘要： The invention relates to a method for forming a pattern on a substrate (S) with an upper surface and a lower surface which comprises the steps of depositing a first layer (E1) of an opaque material on the upper surface of the substrate (S), depositing a photosensitive layer (R) such that part of the photosensitive layer (R) covers at least part of the first layer (E1), exposing the photosensitive layer (R) to a light beam (L), the light beam (L) impinging on the lower surface of the substrate (S) under an oblique angle (Φ) of incidence, removing the exposed region of the photosensitive layer (R), depositing a second layer (E2) of an opaque material such that part of the second layer (E2) covers a remaining region of the photosensitive layer (R), and removing at least a part of the remaining region of the photosensitive layer (R). According to another aspect of the method of the invention anisotropic plasma etching is applied from above the upper surface of the substrate (S) after removal of the exposed region of the photosensitive layer (R) and thereafter the second layer (E2) is deposited. The method of the invention can be applied for forming a source electrode and a drain electrode of a thin-film field effect transistor. The invention furthermore relates to an electronic device fabricated by such a method.

公开(公告)号：EP1360711B1

公开(公告)日：2007-03-14

申请号：EP02700152.8

申请日：2002-01-17

申请人： Infineon Technologies AG

发明人： GOLDBACH, Matthias

IPC分类号： H01L21/033

CPC分类号： H01L21/0332 ,  H01L21/0335 ,  H01L21/31116 ,  H01L21/31144

摘要： The aim of the invention is to increase the etching resistance and to reduce the etching rate of a mask layer (3) containing silicon by mixing an additional substance (8) with the mask layer (3) or with an etching gas. Said additional substance (8) is present, or is built up, in the mask layer (3). Said mask layer (3) is removed at a reduced etching rate during a successive etching process for structuring by means of the mask layer (3).

公开(公告)号：EP1376663A2

公开(公告)日：2004-01-02

申请号：EP03254026.2

申请日：2003-06-25

申请人： Hewlett-Packard Development Company, L.P.

发明人： Tausing, Carl Philip ,  Mei, Ping

IPC分类号： H01L21/027 ,  B41C3/00

CPC分类号： G03F7/0002 ,  B82Y10/00 ,  B82Y40/00 ,  H01L21/0273 ,  H01L21/0334 ,  H01L21/0335 ,  H01L21/3085

摘要： A stamping tool (210) is used to generate three-dimensional resist structures whereby thin film patterning steps can be transferred to the resist in a single molding step and subsequently revealed in layer processing steps. A semiconductor device is formed by depositing a first layer of material [415] over a substrate [410] and forming a 3-dimensional (3D) resist structure [420] over the substrate [410] wherein the 3D resist structure [420] comprises a plurality of different vertical heights throughout the structure [420]. A system for forming a semiconductor device comprises means for depositing a first layer of material [415] over a flexible substrate [410], means for depositing a layer of resist over the flexible substrate [410], means for transferring a 3D pattern to the layer of resist to form a 3D layer of resist [420] over the flexible substrate [410] and means for utilizing the 3D layer of resist [420] to form a cross-point array [440] over the flexible substrate [410].

摘要翻译： 使用冲压工具（210）来生成三维抗蚀剂结构，由此薄膜构图步骤可以在单个模制步骤中转移到抗蚀剂中，并随后在层处理步骤中显露。 半导体器件通过在衬底Ä410u上沉积第一材料层Ä415u而形成，并在衬底上形成三维（3D）抗蚀剂结构Ä410Ü，其中3D抗蚀剂结构Ä420Ü在整个结构中包括多个不同的垂直高度Ä420Ü 。 用于形成半导体器件的系统包括用于在柔性衬底Ä410Ü上沉积第一层材料Ä415Ü的装置，用于在柔性衬底Ä410Ü上沉积抗蚀剂层的装置，用于将3D图案转移到抗蚀剂层以形成 柔性基板Ä410Ü上的3D抗蚀剂层Ä420Ü以及利用抗蚀剂Ä420Ü的3D层在柔性基板Ä410Ü上形成交叉点阵列Ä440Ü的方法。

公开(公告)号：EP1049143A2

公开(公告)日：2000-11-02

申请号：EP00303661.3

申请日：2000-05-02

申请人： LG ELECTRONICS INC.

发明人： Song, Ki Chang ,  Bu, Jong Uk ,  Park, Chil Keun

IPC分类号： H01L21/033 ,  H01L21/308

CPC分类号： H01L21/3085 ,  H01L21/0334 ,  H01L21/0335

摘要： Etching method applicable to a semiconductor device fabrication and an MEMS(Micro-Electro-Mechanical System) process, including the steps of forming an etching mask on a substrate, forming a plurality of patterns in the etching mask corresponding to depths of the plurality of trenches; and etching the substrate using the etching mask having the plurality of patterns formed therein, whereby eliminating an alignment error in respective photolithography, that permits to form a precise structure, simplify a fabrication process, and reduce a production cost.

摘要翻译： 适用于半导体器件制造和MEMS（微机电系统）工艺的蚀刻方法，包括在衬底上形成蚀刻掩模的步骤，在与多个沟槽的深度对应的蚀刻掩模中形成多个图案 ; 并使用其中形成有多个图案的蚀刻掩模来蚀刻基板，从而消除了可以形成精确结构的各光刻中的对准误差，简化了制造工艺，并降低了生产成本。

公开(公告)号：EP0902461A2

公开(公告)日：1999-03-17

申请号：EP98114572.5

申请日：1998-07-31

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Weinrich, Volker, Dr. ,  Engelhardt, Manfred, Dr.

IPC分类号： H01L21/311

CPC分类号： H01L27/10852 ,  C23F4/00 ,  H01L21/0335 ,  H01L21/32139 ,  H01L28/55 ,  H01L28/91

摘要： Erfindungsgemäß wird ein zur Erzeugung von Strukturen mit einem hohen Aspektverhältnis bereitgestellt, das die folgenden Schritte aufweist: das Material der zu erzeugenden Struktur wird in Form einer Schicht bereitgestellt, auf die Schicht wird eine Maske aufgebracht, die Schicht wird unter Verwendung der Maske trockengeätzt, so daß Redepositionen des Schichtmaterials an den Seitenwänden der Maske gebildet werden, die Maske wird entfernt, so daß eine Struktur mit einem hohen Aspektverhältnis zurückbleibt.
Durch das erfindungsgemäße Verfahren lassen sich sehr hohe (≥ 1 µm) und sehr dünne (≤ 50 nm) Strukturen in nur sehr wenigen Prozeßschritten und mit nur einer Maskentechnik relativ einfach und schnell erzeugen. Strukturen mit so großen Aspektverhältnissen, insbesondere wenn sie aus einem leitenden Material bestehen, können anders nicht oder nur mit hohem Aufwand erzeugt werden.

摘要翻译： 根据本发明，提供了一种用于制造具有高纵横比结构，包括以下步骤提供一个：待产生在一个掩模施加层上的层的形式提供结构的材料，该层进行干蚀刻使用掩模，使 掩模的侧壁上形成所述层材料的再沉积，掩模被移除，使得具有高纵横比的结构保持。 本发明的方法可以在非常薄的结构非常高（> = 1微米）和（<= 50nm）的产生相对容易和快速地很少的工艺步骤，和只用一个掩模技术。 具有这样的高纵横比结构，特别是如果它们是由不能产生或只以极大的努力，否则一导电材料制成。

公开(公告)号：EP0812012A1

公开(公告)日：1997-12-10

申请号：EP97303578.5

申请日：1997-05-27

申请人： LUCENT TECHNOLOGIES INC.

发明人： Lin, Cheng-yih ,  Mulgrew, Paul Patrick

IPC分类号： H01L21/321 ,  C23F1/02

CPC分类号： H01L21/32139 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L21/0335 ,  H01L21/28008 ,  Y10S438/978

摘要： In accordance with the invention a metal film structure having tapered sidewalls is made by the steps of applying a first layer of metal on a substrate, applying a second layer of a different material over the first layer, forming a pattern of resist on the second layer and etching the first and second layers in an etchant. The material of the second layer is chosen to interact with the metal of the first layer to increase the lateral etch rate of the second layer, thereby producing a metal film structure having tapered sidewalls. In preferred embodiments, the first layer is Cr, the material of the second layer is Mo, and the etchant is ceric ammonium nitrate. The preferred application of the method is to make conductive thin film lines for thin film transistor arrays used in active matrix liquid crystal displays.

公开(公告)号：EP0487380B1

公开(公告)日：1996-05-29

申请号：EP91403055.6

申请日：1991-11-14

申请人： FRANCE TELECOM

发明人： Haond, Michel

IPC分类号： H01L21/033 ,  H01L21/308 ,  H01L21/28

CPC分类号： H01L21/28114 ,  H01L21/0335 ,  H01L21/3081 ,  H01L21/3085

公开(公告)号：EP0660381A1

公开(公告)日：1995-06-28

申请号：EP93203605.6

申请日：1993-12-21

申请人： Philips Electronics N.V. ,  FLAT PANEL DISPLAY CO. (FPD) B.V.

发明人： Jacobs, Johannes Wilhelmus Maria ,  van den Meerakker, Johannes Engelbertus A. M.

IPC分类号： H01L21/321 ,  H01L31/18 ,  G02F1/1343

CPC分类号： H01L21/0335 ,  G02F1/13439 ,  H01L21/32139 ,  H01L31/1884 ,  Y02E10/50

摘要： For manufacturing an at least substantially transparent conductor pattern or a liquid crystal display device provided with such a conductor pattern, an at least substantially transparent conducting layer (3) and a metal layer (4) are successively provided on a substrate (1) and, while masking with an etching mask (5), exposed to an etching bath. According to the invention, the etching bath contains a first etchant for the metal layer (4) and a second etchant for the underlying transparent conducting layer (3), while the bulk etching rate of the metal layer in the first etchant is smaller than the bulk etching rate of the transparent conducting layer in the second etchant. Thus, a conductor pattern can be obtained which has an eminent pattern and edge definition and bevelled edges whose angle of inclination preferably ranges between 25° and 65°.

摘要翻译： 制造至少基本上透明的导体图案或者设置有至少基本上透明的导电层（3）和在金属层上寻求的导体图案的液晶显示装置（4）依次设置在基板（1）和， 而在蚀刻掩模掩蔽（5）暴露于蚀刻浴中。 。根据本发明，该蚀刻浴包含用于金属层（4）和用于下面的透明导电层的第二蚀刻剂的第一蚀刻剂（3），而在所述第一蚀刻剂的金属层的体蚀刻速率比小 在第二蚀刻剂的透明导电层的块状的蚀刻速率。 因此，导体图案可以得到具有卓越的图案和边缘清晰度和倒角的边缘倾斜其角度优选为25°和65°之间的范围内。