公开(公告)号：EP0650072A3

公开(公告)日：1997-08-13

申请号：EP94115743.0

申请日：1994-10-06

申请人： MOTOROLA, INC.

发明人： Fizgerald, Mark Richard ,  Griffin, Graig Thomas ,  Sater, Glen Eugene

IPC分类号： G01S5/14

CPC分类号： G01S19/41 ,  G01S19/18

摘要： A multi-mode position location method detects the location of movable detection devices (31') which are attached to movable carriers (31) in a simulated battlefield. The multi-mode position location method employs three modes of position location of the detection devices. The first mode is a Global Positioning System (GPS) differentially corrected position (72) of the detection device (31'). The second mode is a multilateration determined position (84) of the detection device. The third mode is an autonomously determined GPS position (78) of the detection device. The autonomously determined position (78) is determined without any differential GPS corrections. The most accurately determined position of the detection device (31') may be used for area weapons effects simulation (10) and carrier tracking by transmitting the carrier's position to a master control station (11).

公开(公告)号：EP0786192A1

公开(公告)日：1997-07-30

申请号：EP96913131.0

申请日：1996-04-26

申请人： MOTOROLA, INC.

发明人： KONOPKA, John, G. ,  STEPHENS, Dennis, L.

IPC分类号： H05B41

CPC分类号： H05B41/295 ,  H05B41/28 ,  Y10S315/05

摘要： A ballast circuit for driving a gas discharge having a source of pulsating and rectified AC (20), an energy storage circuit (30), a switch (40) that can have one end connected to an energy storage inductor and an opposite end that can be connected to circuit common; a control circuit (50) for opening and closing the switch (40) at a rate that is a function of at least a DC control current, a resonant circuit (60) that is coupled to the energy storage circuit (30) for energizing the gas discharge lamp.

公开(公告)号：EP0640151B1

公开(公告)日：1997-07-30

申请号：EP93910682.9

申请日：1993-04-21

申请人： MOTOROLA, INC.

发明人： MOORE, Kevin, D. ,  MISSELE, Carl

IPC分类号： C23C26/00 ,  H01L21/60 ,  H01L23/485

CPC分类号： H01L24/16 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/10145 ,  H01L2224/13024 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  Y10T29/49144 ,  Y10T29/49149

摘要： A method for forming a solder bump on an integrated circuit die utilizes a terminal (12) formed of an electrically conductive, solder-wettable composite material composed of copper particles and a polymeric binder. The terminal comprises a bond pad (24) overlying a passivation layer (20) on the die and a runner section (26) connecting the bond pad to a metal contact (16). The terminal is applied to the die, for example, as an ink by screen printing, after which a body of solder alloy is reflowed in contact with the bond pad to form the bump. A preferred material for the terminal is composed of silver-plated copper particles and a resol type phenolic binder.

公开(公告)号：EP0650111A3

公开(公告)日：1997-07-16

申请号：EP94115952.7

申请日：1994-10-10

申请人： MOTOROLA, INC.

发明人： Tisinger, Eric W. ,  Okada, David M.

IPC分类号： G05F3/24

CPC分类号： G05F3/185 ,  G05F3/24

摘要： A novel off-line bootstrap startup circuit (10) including a high voltage device (100) for providing an initial bias voltage to an integrated circuit (IC) is provided. The high voltage device includes an NMOS transistor (102) having a high source to ground breakdown voltage thereby extending a bias voltage range provided to the IC. This bias voltage range may be needed to support large comparator (303) hysteresis and allow for an unregulated bias voltage. The bootstrap startup circuit becomes inoperative when the bias voltage exceeds a predetermined value.

公开(公告)号：EP0783206A2

公开(公告)日：1997-07-09

申请号：EP96120961.6

申请日：1996-12-27

申请人： MOTOROLA, INC.

发明人： Kallman, Kurt Albert ,  Blanchard, David Scott ,  Bucher, Willam

IPC分类号： H03L7/095

CPC分类号： H03L7/095 ,  H04L7/0334

摘要： In a data synchronizer a timing error estimator (16) samples a received data stream and generates a clock to provide optimal sampling of the data stream, and a lock detector (17) monitors the clock and received data stream to provide an indication of whether optimal sampling has been achieved. The lock detector (17) processes differences between delayed versions of the input which are sampled based upon the clock timing. These sampled differences are then processed by a non-linear circuit (149, 159, 169, 179) to provide a lock signal indication which, when compared to a predetermined threshold signal, is used to provide optimal sampling indication. The lock detector (17) performs computations on real (145) and complex (165) inputs and therefore is compatible with a wide variety of modulation types. The lock detector (17) can be implemented in either analog or digital circuits, making it applicable to a broad range of data synchronizer applications.

摘要翻译： 在数据同步器中，定时误差估计器（16）对接收到的数据流进行采样并产生时钟以提供数据流的最佳采样，并且锁定检测器（17）监测时钟和接收的数据流，以提供是否最佳 抽样已经实现。 锁定检测器（17）处理基于时钟定时采样的输入的延迟版本之间的差异。 然后，这些采样的差异由非线性电路（149,159,169,179）处理，以提供锁定信号指示，当与预定的阈值信号相比时，其被用于提供最佳采样指示。 锁定检测器（17）对实际（145）和复数（165）输入执行计算，因此与各种调制类型兼容。 锁定检测器（17）可以在模拟或数字电路中实现，使其适用于广泛的数据同步器应用。

公开(公告)号：EP0666592A3

公开(公告)日：1997-07-09

申请号：EP95101036.2

申请日：1995-01-26

申请人： MOTOROLA, INC.

发明人： Sellers, James A.

IPC分类号： H01L21/768

CPC分类号： H01L21/76895 ,  H01L21/768 ,  H01L23/5329 ,  H01L2924/0002 ,  Y10S438/948 ,  Y10S438/974 ,  H01L2924/00

摘要： A method for forming a dielectric layer (16) on a high temperature metal layer (14) is provided. By processing the high temperature metal layer (14) with a non-oxidizing photoresist stripper and absent a photoresist hardening step, adhesion between the high temperature metal layer (14) and a dielectric layer (16) subsequently formed on the high temperature metal layer (14) is significantly improved. The dielectric layer (16) will adhere to the high temperature metal layer (14) in high temperature environments. The method is suitable for forming multi-layer metallization and buried layer structures for semiconductor integrated circuits.

公开(公告)号：EP0782181A2

公开(公告)日：1997-07-02

申请号：EP96119955.1

申请日：1996-12-12

申请人： MOTOROLA, INC.

发明人： Tsoi, Hak-Yam ,  Tam, Pak ,  De Fresart, Edouard D.

IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/404 ,  H01L29/41766 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/7802

摘要： A method for forming a semiconductor device includes forming insulated gate regions (122,222) on a substrate (26) using a first photo-masking step, forming a base region (47) through an opening (143) between the insulated gate regions (122,222), and forming a source region (152) within the base region (47). Next, a protective layer (61) is formed and selectively patterned using a second photo-masking step to form an opening (62) within the first opening (143) and an opening (63) above one of the insulated gate regions (122). Next, a portion (66) of the substrate (26) and a portion (67) of the insulated gate region (122) are removed. Ohmic contacts (74,76) are then formed and patterned using a third photo-masking step. Additionally, a termination structure (81) is described.

摘要翻译： 形成半导体器件包括：提供具有第一主表面和第一导电类型的半导体衬底; 使用第一光掩模步骤在所述衬底上形成第一绝缘栅极（IG）区域和第二IG区域; 通过所述第一和第二IG区之间的第一开口在所述衬底中形成第二导电类型的第一掺杂区，所述第一掺杂区与所述第一和第二IG区自对准; 通过所述第一开口在所述第一掺杂区域内形成所述第一导电类型的第二掺杂区域，所述第二掺杂区域与所述第一和第二IG区域自对准; 在衬底上形成保护层; 使用第二光掩模步骤选择性地图案化保护层，以在第一开口内形成第二开口，在第二IG区域上方形成第三开口; 通过所述第二开口去除所述基板的一部分，并且通过所述第三开口去除所述第二IG区域的一部分，以暴露导电部分; 在衬底上形成欧姆层; 以及使用第三光掩模步骤选择性地图案化所述欧姆层，以形成到所述半导体衬底的第一欧姆接触和与所述导电部分的第二欧姆接触。 还声称是垂直功率MOSFET器件。 提供基板不具有场氧化物层。 形成第一和第二IG区域包括：在第一主表面上形成栅介电层; 在所述栅极电介质层上形成导电层; 在所述导电层上形成层间电介质; 形成第一光致抗蚀剂层; 使用第一光掩模步骤图案化光致抗蚀剂层; 去除所述层间电介质的部分和所述导电层的部分以形成第一和第二IG区域; 绝缘暴露部分的导电层，其中层间电介质包括第一氧化硅/氮化硅/第二氧化硅结构。

公开(公告)号：EP0780675A1

公开(公告)日：1997-06-25

申请号：EP96119688.8

申请日：1996-12-09

申请人： MOTOROLA, INC.

发明人： Mirza, Andrew ,  Seddon, Kenneth M.

IPC分类号： G01L9/06 ,  G01L9/00

CPC分类号： G01L9/0042 ,  G01L9/0045

摘要： A sensor (10,30) is formed that does not require a bonding process in an oxygen rich or vacuum ambient. In a first embodiment, a port (14), a channel (15) and an opening (18) are used to provide an oxidizing ambient to a cavity (13). During an oxidation process, the cavity (13) is sealed and any remaining oxidizing ambient is consumed to form a sealed cavity that is under a vacuum pressure. In an alternate embodiment, a cavity (32) is formed in a first substrate (31). The cavity (32) is covered by a second substrate (36) and an opening (33,34) is formed in the second substrate (36) above the cavity (32). These openings (33,34) allow an oxidizing ambient to enter the cavity (32).

摘要翻译： 形成传感器（10,30），其不需要在富氧或真空环境中进行接合工艺。 在第一实施例中，使用端口（14），通道（15）和开口（18）向空腔（13）提供氧化环境。 在氧化过程中，空腔（13）被密封并且任何剩余的氧化环境被消耗以形成处于真空压力下的密封空腔。 在替代实施例中，腔体（32）形成在第一基板（31）中。 腔体（32）被第二基板（36）覆盖，并且在腔体（32）上方的第二基板（36）中形成开口（33,34）。 这些开口（33,34）允许氧化环境进入空腔（32）。

公开(公告)号：EP0725432A3

公开(公告)日：1997-06-04

申请号：EP96101189.7

申请日：1996-01-29

申请人： MOTOROLA, INC.

发明人： O'Neil, Vernon Patrick II ,  Abrokwah, Jonathan K. ,  Hashemi, Majid M. ,  Huang, Jenn-Hwa ,  Nair, Vijay K. ,  Nikpourian, Farideh ,  Tehrani, Saied Nikoo

IPC分类号： H01L21/335 ,  H01L21/8252 ,  H01L21/285 ,  H01L29/778 ,  H01L27/06 ,  H01L29/45

CPC分类号： H01L29/66462 ,  H01L21/28575 ,  H01L21/28581 ,  H01L21/8252 ,  H01L29/452 ,  H01L29/475 ,  H01L29/7783

摘要： A heterostructure field effect transistor and method including at least one passivation layer (20) and at least one etch stop layer (22). Enhancement, depletion and combined devices with both enhancement mode and depletion mode devices are possible with minor process variations. Refractory gate (40) and non-gold refractory ohmic contact (52) metallization combined with other features allows non-liftoff metal patterning.

公开(公告)号：EP0773576A1

公开(公告)日：1997-05-14

申请号：EP96118023.9

申请日：1996-11-11

申请人： MOTOROLA, INC.

发明人： Parker, N. William

IPC分类号： H01J37/30 ,  H01H37/04 ,  H01J37/12

CPC分类号： H01J37/3007 ,  H01J37/04 ,  H01J37/12 ,  H01J2237/04735 ,  H01J2237/04924 ,  H01J2237/0635 ,  H01J2237/3175

摘要： Electron column optics include a first electrical lens assembly (13) positioned to receive electrons from a rectangular electron source (12) and designed to accelerate the electrons to a first range of acceleration. The first electrical lens assembly (13) is further designed to substantially compensate for astigmatism produced by the first acceleration. A second electrical lens assembly (14) is positioned to receive electrons from the first electrical lens assembly (13) and is designed to accelerate the electrons to a second range of acceleration. The second electrical lens assembly (14) is further designed to focus the received electrons onto a remote surface (15).

摘要翻译： 电子柱光学器件包括定位成从矩形电子源（12）接收电子并被设计成将电子加速到第一加速度范围的第一电镜头组件（13）。 第一电镜组件（13）还被设计成基本上补偿由第一加速度产生的像散。 第二电透镜组件（14）被定位成从第一电镜头组件（13）接收电子，并被设计成将电子加速到第二加速度范围。 第二电镜组件（14）被进一步设计成将接收到的电子聚焦到远程表面（15）上。