-
71.
公开(公告)号:EP1537605A1
公开(公告)日:2005-06-08
申请号:EP03761093.8
申请日:2003-06-17
申请人: Nantero, Inc.
IPC分类号: H01L31/109
CPC分类号: H01L51/0575 , B82Y10/00 , H01L29/7722 , H01L51/0048 , H01L51/0504
摘要: A permeable base transistor (PBT) having a base layer (112) including metallic nanotubes (110) embedded in a semiconductor crystal material is disclosed. The nanotube base layer separates emitter (104E) and collector (104C) layers of the semiconductor material. A method of making a permeable base transistor (PBT) is disclosed. According to the method, a semiconductor substrate is provided, a base layer is provided on the substrate, and a semiconductor layer is grown over the base layer. The base layer includes metallic nanotubes, which may be grown or deposited on the semiconductor substrate. The nanotube base layer separates emitter and collector layers of semiconductor material.
-
公开(公告)号:EP1320899A1
公开(公告)日:2003-06-25
申请号:EP01954944.3
申请日:2001-07-25
发明人: CHEN, John , LIANG, Bingwen , SHIH, Robert
IPC分类号: H01L33/00 , H01L27/15 , H01L29/12 , H01L29/20 , H01L31/109
摘要: A Light Emitting Diode (LED) constructed of AlGaInP compounds includes a multi layer window which improves the efficiency of the diode. The window, in the order of formation, includes a lightly doped first layer (207) formed of p doped GaP; a low impedance second layer (208) formed of p GaAs; an amorphous conducting layer (209) formed of Indium Tin Oxide (ITO), and a titanium/gold contact (210). In one embodiment, the contact forms ohmic connections with the second and third layers; and a Shottky diode connection with first layer. In a second embodiment, the contact forms an ohmic connection with the third layer, and is insulated from direct contact with the first layer.
-
公开(公告)号:EP1312123A1
公开(公告)日:2003-05-21
申请号:EP01963936.8
申请日:2001-08-10
IPC分类号: H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/0336 , H01L29/76 , H01L29/94
CPC分类号: H01L29/802 , H01L29/24 , H01L29/267 , H01L29/513 , H01L29/517 , H01L29/66924 , H01L29/7782
摘要: A self-aligned enhancement mode metal-sulfide-compound semiconductor field effect transistor (10) includes a lower sulfide layer that is a mixture of Ga2S, Ga2S3, and other gallium sulfide compounds (30), and a second insulating layer that is positioned immediately on top of the gallium sulphur layer together positioned on upper surface (14) of a III-V compound semiconductor wafer structure (13). Together the lower gallium sulfide compound layer and the second insulating layer form a gallium sulfide gate insulating structure. The gallium sulfide gate insulating structure and underlying compound semiconductor gallium arsenide layer (15) meet at an atomically abrupt interface at the surface of with the compound semiconductor wafer structure (14). The initial essentially gallium sulphur layer serves to passivate and protect the underlying compound semiconductor surface from the second insulating sulfide layer. A refractory metal gate electrode layer (17) is positioned on upper surface (18) of the second insulating sulfide layer. The refractory metal is stable on the second insulating sulfide layer at elevated temperature. Self-aligned source and drain areas, and source and drain contacts (19, 20) are positioned on the source and drain areas (21, 22) of the device. Multiple devices are then positioned in proximity and the appropriate interconnection metal layers and insulators are utilized in concert with other passive circuit elements to form a integrated circuit structure.
-
公开(公告)号:EP1189289A1
公开(公告)日:2002-03-20
申请号:EP00935563.7
申请日:2000-06-07
申请人: Nichia Corporation
IPC分类号: H01L33/00 , H01L31/072 , H01L31/109 , H01L29/68 , H01S5/343
CPC分类号: B82Y20/00 , H01L31/03042 , H01L31/03046 , H01L31/035236 , H01L31/0735 , H01L31/1852 , H01L33/025 , H01L33/06 , H01L33/32 , H01S5/305 , H01S5/3086 , H01S5/309 , H01S5/3407 , H01S5/34333 , Y02E10/544
摘要: An nitride semiconductor device for the improvement of lower operational voltage or increased emitting output, comprises an active layer comprising quantum well layer or layers and barrier layer or layers between n-type nitride. semiconductor layers and p-type nitride semiconductor layers, wherein said quantum layer in said active layer comprises InxGa1-xN (0 16 to 2 × 10 18 /cm 3 .
摘要翻译: 用于改善较低工作电压或提高发射输出的氮化物半导体器件包括一个有源层,该有源层包括一个或多个量子阱层以及位于n型氮化物之间的一个或多个阻挡层。 半导体层和p型氮化物半导体层,其中所述有源层中的所述量子层包括具有450至540nm的峰值波长的In x Ga 1-x N(0
-
公开(公告)号:EP0789935A4
公开(公告)日:1998-08-19
申请号:EP95938897
申请日:1995-10-25
申请人: INTEVAC INC
发明人: DAVIS GARY A
IPC分类号: H01L31/10 , H01J1/34 , H01L21/331 , H01L29/205 , H01L29/66 , H01L29/73 , H01L29/737 , H01L31/032 , H01L31/103 , H01L31/105 , H01L31/108 , H01L31/109 , H01L31/075
CPC分类号: H01L31/1035 , H01L29/205 , H01L31/105 , H01L31/108
摘要: A smooth and monotonic potential energy gradient was established at a p-type (InGa)As - undoped InP heterojunction to efficiently transfer conduction electrons from the (InGa)As:p layer (14) to the InP:ζ layer (20). This potential energy gradient was established with a compositionally graded p-type semiconductor alloy layer (16) and an n-type InP built-in field layer (18) interposed at the heterojunction. The compositionally graded semiconductor alloy layer spatially distributes the conduction band discontinuity of the (InGa)As - InP heterojunction and the InP:n built-in field layer eliminates potential energy barries from the conduction band over a wide range of externally-applied biases including no externally applied bias. The smooth and monotonic potential energy gradient thus established promotes efficient transfer of the conduction electrons due to drift from the (InGa)As:p layer to the large bandgap InP collector layer where they contribute to the output current of any number of electronic devices. The utility of this potential energy grading structure was demonstrated in a transferred-electron photocathode device wherein the efficient transfer of photoelectrons from the (InGa)As:p absorber layer to the InP:ζ electron-transfer layer has been utilized.
-
公开(公告)号:EP0800219A2
公开(公告)日:1997-10-08
申请号:EP97105610.6
申请日:1997-04-04
发明人: Ishibashi, Tadao , Furuta, Tomofumi , Shimizu, Naofumi , Nagata, Koichi , Matsuoka, Yutaka , Tomizawa, Masaaki
IPC分类号: H01L31/105 , H01L31/109
CPC分类号: H01L31/105
摘要: A hetrajunction pin photodiode having a structure capable of high frequency response and saturation output current. The pin photodiode is formed by: a first semiconductor layer (11) of a first conduction type; a second semiconductor layer (12) of a second conduction type; a third semiconductor layer (13) sandwiched between the first and second semiconductor layers, having a doping concentration lower than those of the first and second semiconductor layers; a fourth semiconductor layer (14) of the first conduction type, provided at one side of the first semiconductor layer opposite to a side at which the third semiconductor layer is provided; and a cathode electrode (16) and an anode electrode (15) connected directly or indirectly to the second semiconductor layer (12) and the fourth semiconductor layer (14), respectively. The first semiconductor layer (11) has a bandgap energy by which a charge neutrality condition is maintained in at least a part of the first semiconductor layer and the first semiconductor layer is made to function as a light absorption layer, while the second and third semiconductor layers (12,13) have bandgap energies by which the second and third semiconductor layers are made not to function as a light absorption layer, and the fourth semiconductor layer (14) has a bandgap energy greater than that of the first semiconductor layer.
-
公开(公告)号:EP0522746B1
公开(公告)日:1997-06-04
申请号:EP92305796.2
申请日:1992-06-24
IPC分类号: H01L31/109 , H01L31/107
CPC分类号: H01L31/105 , H01L31/02161 , H01L31/022416 , H01L31/1075
-
公开(公告)号:EP4441795A1
公开(公告)日:2024-10-09
申请号:EP22902355.1
申请日:2022-11-30
发明人: KLEM, Ethan J.D. , GREGORY, Christopher William , HILTON, JR., Jeffery Allan , PROCIDA, Carmen , BOND, Michael , TESSEMA, Tewodros
IPC分类号: H01L31/0352 , G01J1/42 , H01L31/109 , H10K30/00 , H01L31/0256
CPC分类号: G01B11/2513 , B82Y20/00
-
79.
公开(公告)号:EP4439682A1
公开(公告)日:2024-10-02
申请号:EP24157206.4
申请日:2024-02-12
IPC分类号: H01L31/109 , H01L31/032 , H01L29/24
CPC分类号: H01L31/109 , H01L31/032 , H01L29/868 , H01L29/24 , H01L29/66969
摘要: Diode bipolaire ou PIN à hétérojonction verticale à base d'hétérostructures entre les alliages ternaires (Mg)NiO et (AI)Ga2O3 ou (Mg)NiO/i-MgO/(AI)Ga2O3 ou (Mg)NiO/Al2O3/(Al)Ga2O3) caractérisée en ce que le (Mg)NiO étant de type p, le (Al)Ga2O3 étant de type n et la couche intrinsèque soit en MgO ou AI2O3, et que les bandes interdites de Ga2O3 et de NiO ont été augmentées par des alliages avec AI et/ou Mg afin de concevoir de manière appropriée l'alignement desdites bandes interdites et d'optimiser l'injection de porteurs pour permettre le fonctionnement plus efficace de la diode, l'opération d'un photodétecteur à des longueurs d'onde plus courtes et l'opération de l'électronique de puissance à des tensions plus élevées.
-
公开(公告)号:EP4312279A1
公开(公告)日:2024-01-31
申请号:EP23187953.7
申请日:2023-07-26
发明人: SZELAG, Bertrand
IPC分类号: H01L31/105 , H01L31/109 , H01L31/0224 , H01L31/18 , G02B6/42
摘要: L'invention porte sur un procédé de fabrication d'un dispositif optoélectronique comportant une photodiode (2) de type germanium sur silicium couplée à un guide d'onde (3) en Si 3 N 4 . Le procédé comporte les étapes suivantes :
∘ réalisation d'un substrat semiconducteur (20), comportant un empilement semiconducteur de couches minces (23, 24, 25) destinées à former des portions (31, 32, 33) d'un plot semiconducteur (30) de la photodiode (2) ;
∘ réalisation d'un substrat photonique (10), comportant le guide d'onde (3) en Si 3 N 4 ;
∘ report et collage du substrat semiconducteur (20) sur le substrat photonique (10) ;
∘ réalisation de la photodiode (2), par photolithographie et gravure de l'empilement semiconducteur (23, 24, 25) pour former le plot semiconducteur (30) alors situé au-dessus du guide d'onde (3).
-
-
-
-
-
-
-
-
-