摘要:
Manufacturing a semiconductor device involves forming (200) a sacrificial layer where a micro cavity is to be located, forming (210) a metal layer of thickness greater than 1 micron over the sacrificial layer, forming (220) a porous layer from the metal layer, the porous layer having pores of length greater than ten times their breadth, and having a breadth in the range 10nm -500 nanometers. The pores can be created by anodising, electrodeposition or dealloying. Then the sacrificial layer can be removed (230) through the porous layer, to form the micro cavity, and pores can be sealed (240). Encapsulating MEMS devices with a porous layer can reduce costs by avoiding using photolithography for shaping the access holes since the sacrificial layer is removed through the porous membrane.
摘要:
The bipolar hetero-junction transistor according to the present invention has a layer forming the emitter substantially consisting of doped and hydrogenated semiconductor material at least partly in amorphous form. A high current gain (β) is obtained because a wide bandgap in the emitter material. Preferably the layer forming the emitter consists of microcrystalline silicon doped and hydrogenated, which renders a small base resistance being preferable for high frequency purposes. The amorphous bipolar hetero-junction transistor can be produced by CVD- technique, by using a plasma or by photodissociation. The transistor having a microcrystalline emitter layer can be produced by one of said methods by heating an amorphous emitter layer.
摘要:
The present invention is related to an Electrostatic Discharge protection device. This may be a semiconductor device such as a CMOS transistor, having a snap-back IV characteristic, in order to withstand ESD pulses. The device of the invention comprises an additional doped region (30), which influences the internal resistance of the substrate whereupon the device is built. This has a positive effect on the snap-back characteristic, putting the snap back trigger voltage and current at a lower value, compared to prior art devices.
摘要:
L'invention concerne un procédé d'analyse d'un échantillon solide par érosion au moyen d'un faisceau de particules, pulsé, consistant à : - balayer l'échantillon sur une surface dite surface de balayage (6), pour creuser un cratère à fond plat, ce fond plat (2) constituant une surface dite d'analyse (5) ; - ioniser les particules arrachées à la surface d'analyse (5), au moyen d'un faisceau laser pulsé ; - identifier les particules arrachées et ionisées, au moyen d'un spectromètre de masse. Le temps mort disponible entre deux impulsions du faisceau laser est utilisé pour éroder les flancs (3) du cratère, car ils doivent être érodés aussi, bien qu'ils ne fassent pas partie de la surface d'analyse proprement dite (5). Ainsi le temps nécessaire pour éroder l'échantillon jusqu'à une certaine profondeur est minimisée sans perdre d'informations. Application à la mesure du profil en profondeur de la concentration des impuretés dans un échantillon solide.