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    VICINAL GALLIUM NITRIDE SUBSTRATE FOR HIGH QUALITY HOMOEPITAXY
    5.
    发明公开
    VICINAL GALLIUM NITRIDE SUBSTRATE FOR HIGH QUALITY HOMOEPITAXY 有权
    用于高质量等离子体的VICINAL GALLIUM NITRIDE SUBSTRATE

    公开(公告)号：EP1684973A2

    公开(公告)日：2006-08-02

    申请号：EP04811011.8

    申请日：2004-11-12

    申请人： CREE, INC.

    发明人： VAUDO, Robert, P. ,  XU, Xueping ,  FLYNN, Jeffrey, S. ,  BRANDES, George, R.

    IPC分类号： B32B9/00 ,  C30B29/38 ,  C30B29/40 ,  H01L21/46

    CPC分类号： C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L29/045 ,  H01L29/2003 ,  Y10T83/0524 ,  Y10T428/31

    摘要： A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the direction predominately toward the direction or the direction, at the offcut angle in a range that is from about 0.2 to about 10 degrees (FIGURE 9). The surface has a RMS roughness measured by 50 x 50 mircometers squared AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm-2. The substrate can be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication III-V nitride-based microelectronic and optoelectronic devices.

    摘要翻译： 包括从<0001>方向主要朝向<1010>方向或<1120>方向切割的（0001）表面的III-V族氮化物，例如GaN衬底，切割角为约0.2 到大约10度（图9）。 该表面具有RMS粗糙度，其通过50×50微米平方AFM扫描测得小于1nm，并且位错密度小于3E6cm-2。 通过在对应的邻近异质外延衬底（例如切割蓝宝石）上切割或生长衬底主体，可以通过对相应的晶锭或晶片坯料进行切割切片来形成衬底。 在制造基于Ⅲ-Ⅴ氮化物的微电子和光电子器件中，衬底可用于同质外延沉积。

    DOPED GROUP III-V NITRIDE MATERIALS, AND MICROELECTRONIC DEVICES AND DEVICE PRECURSOR STRUCTURES COMPRISING SAME
    6.
    发明公开
    DOPED GROUP III-V NITRIDE MATERIALS, AND MICROELECTRONIC DEVICES AND DEVICE PRECURSOR STRUCTURES COMPRISING SAME 有权
    德尔塔掺杂的氮化III-V族的HEMT

    公开(公告)号：EP1488460A1

    公开(公告)日：2004-12-22

    申请号：EP03721392.3

    申请日：2003-03-19

    申请人： CREE, INC.

    发明人： FLYNN, Jeffrey, S. ,  BRANDES, George, R.

    IPC分类号： H01L29/205 ,  H01L29/778 ,  H01L33/00 ,  H01L31/0304 ,  H01L21/36

    CPC分类号： H01L29/7784 ,  H01L29/155 ,  H01L29/2003 ,  H01L29/365 ,  H01L33/025 ,  H01S5/305 ,  H01S5/32341

    摘要： A Group III-V nitride microelectronic device structure including a delta doped layer (24) and/or a doped superlattice. A delta doping method is described, including the steps of: depositing semiconductor material on a substrate by a first epitaxial film growth process; terminating the deposition of semiconductor material on the substrate to present an epitaxial film surface; delta doping the semiconductor material at the epitaxial film surface, to form a delta doping layer thereon; terminating the delta doping; resuming deposition of semiconductor material to deposit semiconductor material on the delta doping layer, in a second epitaxial film growth process; and continuing the semiconductor material second epitaxial film growth process to a predetermined extent, to form a doped microelectronic device structure, wherein the delta doping layer (24) is internalized in semiconductor material deposited in the first and second epitaxial film growth processes.