公开(公告)号：EP1933386A1

公开(公告)日：2008-06-18

申请号：EP06797281.0

申请日：2006-09-01

申请人： THE KANSAI ELECTRIC POWER CO., INC. ,  Central Research Institute of Electric Power Industry

发明人： MIYANAGI, Toshiyuki ,  TSUCHIDA, Hidekazu ,  KAMATA, Isaho ,  NAGANO, Masahiro ,  SUGAWARA, Yoshitaka ,  NAKAYAMA, Koji ,  ISHII, Ryosuke

IPC分类号： H01L29/861 ,  H01L21/324 ,  H01L21/329

CPC分类号： H01L29/66068 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/0485 ,  H01L29/1608 ,  H01L29/861

摘要： In a bipolar silicon carbide semiconductor device in which an electron and a hole recombine with each other during current passage within a silicon carbide epitaxial film grown from a surface of a silicon carbide single crystal substrate, an object of the present invention is to reduce defects which are the nuclei of a stacking fault which is expanded by current passage, thereby suppressing the increase of the forward voltage of the bipolar silicon carbide semiconductor device. In a method for producing a bipolar silicon carbide semiconductor device of the present invention, the device is subjected to a thermal treatment at a temperature of 300°C or higher in the final step of production. Preferably, the above-mentioned thermal treatment is carried out after the formation of electrodes and then the resulting bipolar silicon carbide semiconductor device is mounted in a package.

摘要翻译： 在从碳化硅单晶衬底的表面生长的碳化硅外延膜内的电流通过期间电子和空穴彼此复合的双极性碳化硅半导体器件中，本发明的目的是减少 是通过电流通过而膨胀的堆垛层错的核，从而抑制双极碳化硅半导体器件的正向电压的增加。 在本发明的双极性碳化硅半导体器件的制造方法中，在最终的制造工序中，在300℃以上的温度下进行热处理。 优选地，在形成电极之后进行上述热处理，然后将所得的双极性碳化硅半导体器件安装在封装中。

公开(公告)号：EP1933386B1

公开(公告)日：2012-11-07

申请号：EP06797281.0

申请日：2006-09-01

申请人： Central Research Institute of Electric Power Industry

发明人： MIYANAGI, Toshiyuki ,  TSUCHIDA, Hidekazu ,  KAMATA, Isaho ,  NAGANO, Masahiro ,  SUGAWARA, Yoshitaka ,  NAKAYAMA, Koji ,  ISHII, Ryosuke

IPC分类号： H01L29/861 ,  H01L21/329 ,  H01L21/18 ,  H01L29/24

CPC分类号： H01L29/66068 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/0485 ,  H01L29/1608 ,  H01L29/861

公开(公告)号：EP2154725A1

公开(公告)日：2010-02-17

申请号：EP08740870.4

申请日：2008-04-25

申请人： The Kansai Electric Power Co., Inc. ,  Central Research Institute of Electric Power Industry

发明人： ISHII, Ryosuke ,  NAKAYAMA, Koji ,  SUGAWARA, Yoshitaka ,  TSUCHIDA, Hidekazu

IPC分类号： H01L29/866 ,  H01L29/06 ,  H01L29/861

CPC分类号： H01L29/866 ,  H01L29/0615 ,  H01L29/1608 ,  H01L29/66106

摘要： Provided are silicon carbide mesa Zener diodes that are free of electric field concentration at a p-n junction end on the mesa wall and thereby have a high current capacity.
The silicon carbide Zener diode is a bipolar semiconductor device that has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, formed thereon, a silicon carbide conductive layer of a first conductivity type, and a silicon carbide conductive layer of a second conductivity type formed on the silicon carbide conductive layer of a first conductivity type, wherein a depletion layer that is formed under reverse bias at a junction between the silicon carbide conductive layer of a first conductivity type and the silicon carbide conductive layer of a second conductivity type does not reach a mesa corner formed in the silicon carbide conductive layer of a first conductivity type.

摘要翻译： 提供的碳化硅台面齐纳二极管在台面壁上的p-n结端处没有电场浓度，从而具有高电流容量。 所述碳化硅齐纳二极管是具有台面结构的双极半导体器件，包括形成在其上的第一导电类型的碳化硅单晶衬底，第一导电类型的碳化硅导电层和碳化硅导电层 形成在第一导电类型的碳化硅导电层上的第二导电类型，其中在第一导电类型的碳化硅导电层与第二导电类型的碳化硅导电层之间的接合处以反向偏压形成的耗尽层 导电类型不会到达形成在第一导电类型的碳化硅导电层中的台面角。

公开(公告)号：EP2110857A1

公开(公告)日：2009-10-21

申请号：EP08704291.7

申请日：2008-01-31

申请人： The Kansai Electric Power Co., Inc. ,  Central Research Institute of Electric Power Industry

发明人： ISHII, Ryosuke ,  NAKAYAMA, Koji ,  SUGAWARA, Yoshitaka ,  TSUCHIDA, Hidekazu

IPC分类号： H01L29/866 ,  H01L21/329 ,  H01L29/06 ,  H01L29/861

CPC分类号： H01L29/866 ,  H01L29/06 ,  H01L29/0615 ,  H01L29/1608 ,  H01L29/36 ,  H01L29/66106 ,  H01L29/8613

摘要： Bipolar semiconductor devices have a Zener voltage controlled highly precisely in a wide range of Zener voltages (for example, from 10 to 500 V). A bipolar semiconductor device has a mesa structure and includes a silicon carbide single crystal substrate of a first conductivity type, a silicon carbide conductive layer of a first conductivity type, a highly doped layer of a second conductivity type and a silicon carbide conductive layer of a second conductivity type which substrate and conductive layers are laminated in the order named.

摘要翻译： 双极型半导体器件具有一个齐纳电压在宽范围纳电压的控制高度精确地（例如，从10到500伏）。 一种双极半导体装置具有台面结构，并包括碳化硅的第一导电类型的单晶衬底，具有第一导电类型的碳化硅导电层，第二导电型的高掺杂层和的碳化硅导电层 其中基材层和导电层被层叠以指定的顺序第二导电类型。

公开(公告)号：EP1973165A1

公开(公告)日：2008-09-24

申请号：EP06834573.5

申请日：2006-12-13

申请人： THE KANSAI ELECTRIC POWER CO., INC. ,  Central Research Institute of Electric Power Industry

发明人： ISHII, Ryosuke ,  NAKAYAMA, Koji ,  SUGAWARA, Yoshitaka ,  MIYANAGI, Toshiyuki ,  TSUCHIDA, Hidekazu ,  KAMATA, Isaho ,  NAKAMURA, Tomonori

IPC分类号： H01L29/861 ,  H01L21/28 ,  H01L29/06 ,  H01L29/417

CPC分类号： H01L29/1604 ,  H01L21/0465 ,  H01L21/047 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/8613

摘要： In a SiC bipolar semiconductor device with a mesa structure having a SiC drift layer of a first conductive type and a SiC carrier injection layer of a second conductive type that are SiC epitaxial layers grown from a surface of a SiC single crystal substrate, the formation of stacking faults and the expansion of the area thereof are prevented and thereby the increase in forward voltage is prevented. Further, a characteristic of withstand voltage in a reverse biasing is improved. An forward-operation degradation preventing layer is formed on a mesa wall or on a mesa wall and a mesa periphery to separate spatially the surface of the mesa wall from a pn-junction interface. In one embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide low resistance layer of a second conductive type that is equipotential during the application of a reverse voltage. In another embodiment, the forward-operation degradation preventing layer is composed of a silicon carbide conductive layer of a second conductive type, and a metal layer that is equipotential during the application of a reverse voltage is formed on a surface of the silicon carbide conductive layer. In still another embodiment, the forward-operation degradation preventing layer is composed of a high resistance amorphous layer.

摘要翻译： 在具有从SiC单晶衬底的表面生长的SiC外延层的具有第一导电类型的SiC漂移层和第二导电类型的SiC载流子注入层的台面结构的SiC双极半导体器件中， 防止了堆垛层错和其面积的扩大，从而防止了正向电压的增加。 此外，反向偏置中的耐受电压的特性得到改善。 在台面壁上或在台面壁和台面周边上形成正向操作退化防止层，以在空间上将台面壁的表面与pn结界面分开。 在一个实施例中，正向工作劣化防止层由在施加反向电压期间等电位的第二导电类型的碳化硅低电阻层组成。 在另一实施例中，正向操作劣化防止层由第二导电类型的碳化硅导电层构成，并且在施加反向电压期间等电位的金属层形成在碳化硅导电层的表面上 。 在又一个实施例中，正向操作劣化防止层由高电阻非晶层构成。