公开(公告)号：EP0918355A2

公开(公告)日：1999-05-26

申请号：EP98203298.9

申请日：1998-09-29

Applicant: DELCO ELECTRONICS CORPORATION

Inventor： Cornell, Ralph Edward ,  Erickson, Curtis A. ,  Vaidyanthan, Aparna

IPC: H01L23/485

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K3/3436 ,  H05K2201/09381 ,  H05K2201/097 ,  H05K2203/0465 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

Abstract: A surface mount circuit device (110), such as a flip chip, of the type which is attached to a conductor pattern (126) with solder bump connections (120). The solder bump connections (120) are formed by reflowing solder on shaped input/output pads (112) on the device (110), with the shape of the pads (112) being tailored to favorably affect optimal distribution, shape and height of the solder bump connections (120) following reflow soldering of the device (110) to the conductor pattern (126). The solder bump connections (120) are preferably characterized by a shape that increases the stand-off height of the device (110). The shaped solder bump connections (120) also promote stress relief during thermal cycling, improve mechanical bonding, allow better penetration of cleaning solutions, and improve flow of encapsulation materials between the device (110) and its substrate (122).

公开(公告)号：EP0889512A3

公开(公告)日：1999-07-21

申请号：EP98201848.3

申请日：1998-06-04

Applicant: DELCO ELECTRONICS CORPORATION

Inventor： Coapman, Christine Redder ,  Paszkiet, Christine Ann ,  Cornell, Ralph Edward

IPC: H01L21/48 ,  H01L21/60 ,  H01L23/485

CPC classification number: H01L24/12 ,  H01L23/49811 ,  H01L24/11 ,  H01L2224/05139 ,  H01L2224/05639 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K1/092 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09381 ,  H05K2201/09736 ,  H05K2201/10674 ,  H05K2201/2081 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

Abstract: A conductor (112) and method for attaching a surface mount device to the conductor (112), in which solder bumps (16) formed by the method are characterized as being accurately located on the conductor (112) and having a bump height and shape that provides stress relief during thermal cycles, minimizes bridging between adjacent bumps (16), allows penetration of cleaning solutions for removing undesirable residues, and enables the penetration of mechanical bonding and encapsulation materials between the chip and its substrate (10). Such benefits are achieved by forming the conductor (112) of a nonsolderable material, on which a solderable pillar (114) is formed. The pillar (114) is selectively formed to have a shape that determines the distribution and height of the solder bump (16) on the conductor (112).

公开(公告)号：EP0655779A1

公开(公告)日：1995-05-31

申请号：EP94203167.5

申请日：1994-10-31

Applicant: DELCO ELECTRONICS CORPORATION

Inventor： Higdon, William David ,  Yeh, Shing ,  Cornell, Ralph Edward ,  Blanton, James Arthur

IPC: H01L21/60

CPC classification number: H01L24/11 ,  H01L2224/13099 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/00

Abstract: A method of forming solder bumps (56) for use as terminals of an integrated circuit flip chip encompasses the use of a photoresist (52) which can be selectively patterned (54) with known photoengraving techniques, through which a preformulated solder composition can be accurately and selectively deposited on the surface (50) of the flip chip. A dry film photoresist (52) is used as a mask to apply a solder paste (56), such that precise registration, fine pitch bump arrays, and precise bump size control are possible. Precise control of the composition of the solder bumps (58) is also enabled, which relies on processing techniques which minimise processing costs. The process does not generate chlorofluorocarbons.

Abstract translation: 形成用作集成电路倒装芯片的端子的焊料凸块（56）的方法包括使用可以用已知的光刻技术选择性地图案化（54）的光致抗蚀剂（52），通过该技术可以预先制备出的焊料组合物 并且选择性地沉积在倒装芯片的表面（50）上。 使用干膜光致抗蚀剂（52）作为掩模来施加焊膏（56），使得精确配准，细间距凸块阵列和精确的凸块尺寸控制是可能的。 也可以精确控制焊料凸块（58）的组成，这依赖于最小化加工成本的加工技术。 该方法不产生氯氟烃。

公开(公告)号：EP0889512A2

公开(公告)日：1999-01-07

申请号：EP98201848.3

申请日：1998-06-04

Applicant: DELCO ELECTRONICS CORPORATION

Inventor： Coapman, Christine Redder ,  Paszkiet, Christine Ann ,  Cornell, Ralph Edward

IPC: H01L21/48 ,  H01L21/60 ,  H01L23/485

CPC classification number: H01L24/12 ,  H01L23/49811 ,  H01L24/11 ,  H01L2224/05139 ,  H01L2224/05639 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K1/092 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09381 ,  H05K2201/09736 ,  H05K2201/10674 ,  H05K2201/2081 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/013

Abstract: A conductor (112) and method for attaching a surface mount device to the conductor (112), in which solder bumps (16) formed by the method are characterized as being accurately located on the conductor (112) and having a bump height and shape that provides stress relief during thermal cycles, minimizes bridging between adjacent bumps (16), allows penetration of cleaning solutions for removing undesirable residues, and enables the penetration of mechanical bonding and encapsulation materials between the chip and its substrate (10). Such benefits are achieved by forming the conductor (112) of a nonsolderable material, on which a solderable pillar (114) is formed. The pillar (114) is selectively formed to have a shape that determines the distribution and height of the solder bump (16) on the conductor (112).

Abstract translation: 导体（112）和用于将表面安装器件连接到导体（112）的方法，其中通过该方法形成的焊料凸点（16）的特征在于精确地位于导体（112）上并具有凸起高度和形状 在热循环期间提供应力消除，使相邻凸块（16）之间的桥接最小化，允许穿透清洁溶液以除去不需要的残留物，并且使得能够在芯片和其基板（10）之间穿透机械粘合和封装材料。 这样的益处通过形成不可焊材料的导体（112）来实现，其上形成有可焊接的支柱（114）。 所述支柱（114）选择性地形成为具有确定所述导体（112）上的所述焊料凸块（16）的分布和高度的形状。