公开(公告)号：EP3295770A1

公开(公告)日：2018-03-21

申请号：EP16723288

申请日：2016-05-02

Applicant: PHILIPS LIGHTING HOLDING BV

Inventor： HAGELAAR JORIS HUBERTUS ANTONIUS ,  VROEGOP AART JAN

IPC: H05B33/08 ,  F21S4/00 ,  F21V5/00 ,  H05K1/18

CPC classification number: H05B33/0803 ,  H05B33/0821 ,  H05K1/025 ,  H05K1/189 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/10106

Abstract: The present invention provides a light emitting diode(s), LED, light strip arranged for providing improved color consistency over its length. The LED light strip comprises LED strings positioned along the length of the LED light strip and powered in parallel, for emitting, for example, red, green, blue and white light. The resistance of the supply and return traces, in combination with variations in the current drawn by or the forward voltage of the various LED and resistors used in the LED strings of different color, causes a voltage drop along these traces leading to inconsistent color rendering. By adjusting the resistivity of the traces, such as through providing return paths having different resistances for LED strings of different color, the consistency of the color rendering can be improved.

公开(公告)号：EP3090609B1

公开(公告)日：2017-06-28

申请号：EP14812556.0

申请日：2014-12-17

Applicant: Philips Lighting Holding B.V.

Inventor： DE VAAN, Adrianus Johannes Stephanus Maria ,  PEELS, Wilhelmus Gerardus Maria ,  DEEBEN, Josephus Paulus Augustinus

IPC: H05K3/44 ,  H05K1/02 ,  H05K1/09 ,  H05K3/00 ,  H05K3/12 ,  H05K1/05 ,  H05K3/32

CPC classification number: H05K3/32 ,  H05K1/0284 ,  H05K1/056 ,  H05K1/092 ,  H05K3/0014 ,  H05K3/0061 ,  H05K3/1216 ,  H05K3/125 ,  H05K3/321 ,  H05K3/44 ,  H05K2201/0129 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/10106 ,  H05K2201/10113 ,  H05K2203/1461

公开(公告)号：EP2327282B1

公开(公告)日：2017-01-04

申请号：EP09807322.4

申请日：2009-08-13

Applicant: VIASYSTEMS TECHNOLOGIES CORP., L.L.C.

Inventor： KUMAR, Raj ,  DREYER, Monte ,  TAYLOR, Michael, J. ,  ZEPEDA, Ruben

IPC: H05K1/11 ,  H05K1/03 ,  H05K3/46 ,  H05K3/42 ,  H05K3/40 ,  H05K3/38

CPC classification number: H05K3/4614 ,  H05K3/386 ,  H05K3/4069 ,  H05K3/427 ,  H05K3/429 ,  H05K3/462 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/0352 ,  H05K2201/09454 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09736 ,  H05K2201/09845 ,  H05K2203/0191 ,  H05K2203/0554 ,  H05K2203/061 ,  H05K2203/1152 ,  Y10T29/49128 ,  Y10T29/49156 ,  Y10T29/49165

公开(公告)号：EP3032928A1

公开(公告)日：2016-06-15

申请号：EP15195582.0

申请日：2015-11-20

Applicant: General Electric Company

Inventor： ROESSLER, Robert Joseph

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/115 ,  C25D5/022 ,  H05K1/0263 ,  H05K1/0265 ,  H05K3/0091 ,  H05K3/06 ,  H05K3/243 ,  H05K2201/09336 ,  H05K2201/09509 ,  H05K2201/09736

Abstract: A multilayer printed circuit board 100 is provided. The multilayer printed circuit board includes a core 102, a first conductive layer 104 coupled to the core, an insulating layer 106 covering the first conductive layer, and a second conductive layer 108 spaced from the first conductive layer by the insulating layer. The first conductive layer includes a first portion 130 having a first thickness and a second portion 134 having a second thickness greater than the first thickness. The second conductive layer is electrically coupled to the second portion of the first conductive layer by a conductive via 124 extending through the insulating layer.

Abstract translation: 提供多层印刷电路板100。 多层印刷电路板包括芯102，耦合到芯的第一导电层104，覆盖第一导电层的绝缘层106和通过绝缘层与第一导电层间隔开的第二导电层108。 第一导电层包括具有第一厚度的第一部分130和具有大于第一厚度的第二厚度的第二部分134。 第二导电层通过延伸穿过绝缘层的导电通孔124电耦合到第一导电层的第二部分。

公开(公告)号：EP2833704A4

公开(公告)日：2016-01-06

申请号：EP13769962

申请日：2013-03-27

Applicant: FUJIKURA LTD

Inventor： MATSUMARU KOHEI

IPC: H05K1/02

CPC classification number: H01P3/026 ,  H05K1/0245 ,  H05K1/0248 ,  H05K1/025 ,  H05K1/0271 ,  H05K1/0274 ,  H05K2201/09227 ,  H05K2201/09727 ,  H05K2201/09736 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/10121

Abstract: A wiring board including: a board; a differential transmission line which is constituted by two wirings disposed on the board in parallel; an insulation resin layer which is formed on part of a face of the board, wherein a stepped portion constituted by a lateral face of the insulation resin layer is formed at a boundary between the face of the board and a top face of the insulation resin layer, the two wirings extend from the face of the board to the top face of the insulation resin layer so as to traverse the stepped portion, and the extending direction of the wirings traversing the stepped portion and the direction of a periphery are perpendicular to each other in a plan view of the board, the periphery being defined by a boundary between the top face of the insulation resin layer and the lateral face of the insulation resin layer constituting the stepped portion.

公开(公告)号：EP2919564A1

公开(公告)日：2015-09-16

申请号：EP14185185.7

申请日：2014-09-17

Applicant: Toshiba Lighting & Technology Corporation

Inventor： Hino, Kiyokazu

IPC: H05K1/03 ,  H05K3/12

CPC classification number: F21V23/001 ,  F21V23/005 ,  F21V23/06 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/09 ,  H05K1/111 ,  H05K1/115 ,  H05K1/181 ,  H05K3/1216 ,  H05K3/246 ,  H05K2201/0338 ,  H05K2201/035 ,  H05K2201/09509 ,  H05K2201/09736 ,  H05K2201/10106 ,  Y02P70/611

Abstract: According to one embodiment, a light emitting module substrate includes: a base body that uses a ceramic; and a wiring pattern which is provided on a surface of the base body and in which a thickness in a region to be soldered is thicker than that in a region other than the region to be soldered.

Abstract translation: 根据一个实施例，发光模块基板包括：使用陶瓷的基体; 以及布置图案，其设置在基体的表面上，并且其中要焊接的区域中的厚度比除了要焊接的区域之外的区域的厚度厚。

公开(公告)号：EP2849543A1

公开(公告)日：2015-03-18

申请号：EP13184042.3

申请日：2013-09-12

Applicant: Fujitsu Semiconductor Limited

Inventor： Dedic, Ian Juso

IPC: H05K1/02 ,  H01P11/00 ,  H01P1/22 ,  H01L23/64

CPC classification number: H01P1/268 ,  H01L23/64 ,  H01L2924/0002 ,  H01P1/22 ,  H01P1/227 ,  H01P11/003 ,  H03H7/383 ,  H05K1/0219 ,  H05K1/0246 ,  H05K1/025 ,  H05K2201/09727 ,  H05K2201/09736 ,  H01L2924/00

Abstract: A lossy electrical-signal transmission line having first and second ends, the transmission line being configured such that: its characteristic impedance at the first end has a first value; its characteristic impedance at the second end has a second value, lower than the first value; and its series resistance measured from its first end to its second end is within a given range of the difference between said first and second values.

Abstract translation: 一种具有第一和第二端的有损耗的电信号传输线，所述传输线被配置为使得其第一端的特征阻抗具有第一值; 其在第二端的特征阻抗具有低于第一值的第二值; 并且其从其第一端到其第二端测量的串联电阻在所述第一值和第二值之间的差的给定范围内。

公开(公告)号：EP2367405A4

公开(公告)日：2012-06-27

申请号：EP09830368

申请日：2009-11-30

Applicant: PANASONIC CORP

Inventor： YOSHIOKA SHINGO ,  FUJIWARA HIROAKI

IPC: H05K1/02 ,  H05K1/16 ,  H05K3/10 ,  H05K3/18 ,  H05K3/46

CPC classification number: H05K3/107 ,  H05K3/0032 ,  H05K3/184 ,  H05K2201/0376 ,  H05K2201/09736 ,  H05K2203/0565

公开(公告)号：EP2367405A1

公开(公告)日：2011-09-21

申请号：EP09830368.8

申请日：2009-11-30

Applicant: Panasonic Electric Works Co., Ltd.

Inventor： YOSHIOKA, Shingo ,  FUJIWARA, Hiroaki

IPC: H05K3/10 ,  H05K3/18 ,  H05K3/22

CPC classification number: H05K3/107 ,  H05K3/0032 ,  H05K3/184 ,  H05K2201/0376 ,  H05K2201/09736 ,  H05K2203/0565

Abstract: One aspect of the present invention resides in a method of producing a circuit board, including a film-forming step of forming a resin film on a surface of an insulative substrate; a circuit pattern-forming step of forming a circuit pattern portion by forming a recessed portion having a depth equal to or greater than a thickness of the resin film, with an outer surface of the resin film serving as a reference; a catalyst-depositing step of depositing a plating catalyst or a precursor thereof on a surface of the circuit pattern portion and a surface of the resin film; a film-separating step of removing the resin film from the insulative substrate; and a plating step of forming an electroless plating film only in a region where the plating catalyst or the precursor thereof remains after the resin film is separated.

Abstract translation: 本发明的一个方面在于制造电路板，包括：形成树脂薄膜上的绝缘性基板的表面的成膜工序的方法; 通过形成具有深度等于或大于厚度的树脂膜，电影，具有在薄膜作为基准的树脂的外表面的凹部形成的电路图案部的电路图案形成步骤; 一催化剂沉积沉积催化剂电镀或电路图案部分和所述树脂成膜的表面的在其表面上的前体的步骤; 去除树脂膜从绝缘基材的膜分离工序; 并且其中所述镀催化剂或其前体保持薄膜只在一个区域上形成非电解镀敷的镀敷工序中的树脂膜分离之后。

公开(公告)号：EP1786035B1

公开(公告)日：2011-09-21

申请号：EP06023024.0

申请日：2006-11-06

Applicant: Semikron Elektronik GmbH & Co. KG Patentabteilung

Inventor： Göbl, Christian ,  Popp, Rainer

IPC: H01L25/16 ,  H05K1/14 ,  H05K7/20

CPC classification number: H01L25/165 ,  H01L23/3675 ,  H01L24/33 ,  H01L25/162 ,  H01L2924/1301 ,  H01L2924/13091 ,  H05K1/141 ,  H05K1/147 ,  H05K1/189 ,  H05K3/366 ,  H05K7/20445 ,  H05K7/209 ,  H05K2201/0352 ,  H05K2201/049 ,  H05K2201/09736 ,  H05K2201/10674 ,  Y10T428/24777 ,  Y10T428/31678 ,  H01L2924/00