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1.发明公开
公开(公告)号：EP0078501A2
公开(公告)日：1983-05-11
申请号：EP82109931.4
申请日：1982-10-27
申请人： Hitachi, Ltd.
发明人： Nakazato, Kazuo , Nakamura, Tohru , Matsuda, Masatoshi , Miyazaki, Takao , Kure, Tokuo , Okabe, Takahiro , Nagata, Minoru
IPC分类号： H01L29/08
CPC分类号： H01L29/66272 , H01L21/033 , H01L29/42304 , H01L29/72 , H01L29/732 , H01L29/735
摘要： A semiconductor device wherein the active regions of a transistor are formed in an opening provided in an insulating film (17, 19, 110) electrodes (10, 10', 10") are led out by a polycrystalline silicon film (18) formed on the insulating film, and the upper surfaces of the emitter and base electrodes and the exposed surface of the insulating film are substantially even.
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公开(公告)号：EP0003559A1
公开(公告)日：1979-08-22
申请号：EP79100288.4
申请日：1979-01-31
申请人： Hitachi, Ltd.
发明人： Okada, Yutaka , Nakamura, Tohru , Okabe, Takahiro
CPC分类号： H03K19/091 , G05F3/265
摘要： A current mirror circuit (20) formed of a PNP (NPN) transistor (201) employs as its load an 1 2 L circuit (30), an injector (31) of the 1 2 L circuit (30) being common with those of another group of I 2 L circuits (40), and a predetermined current being derived from the PNP (NPN) transistor (201) of the current mirror circuit (20).
摘要翻译： 由PNP（NPN）晶体管（201）形成的电流镜电路（20）作为其负载使用I 2 L电路（30），I 2 L电路（30）的注入器（31）为 与另一组I <2> L电路（40）的那些共用，并且从电流镜电路（20）的PNP（NPN）晶体管（201）导出预定电流。
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公开(公告)号：EP0118102B1
公开(公告)日：1993-05-12
申请号：EP84102143.9
申请日：1984-02-29
申请人： HITACHI, LTD.
发明人： Nakazato, Kazuo , Nakamura, Tohru , Miyazaki, Takao , Natsuaki, Nobuyoshi , Ogirima, Masahiko , Nagata, Minoru
IPC分类号： H01L21/285 , H01L29/72 , H01L27/06
CPC分类号： H01L29/66272 , H01L21/8222 , H01L29/72 , H01L29/7325
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公开(公告)号：EP0118102A2
公开(公告)日：1984-09-12
申请号：EP84102143.9
申请日：1984-02-29
申请人： HITACHI, LTD.
发明人： Nakazato, Kazuo , Nakamura, Tohru , Miyazaki, Takao , Natsuaki, Nobuyoshi , Ogirima, Masahiko , Nagata, Minoru
IPC分类号： H01L21/285 , H01L29/72 , H01L27/06
CPC分类号： H01L29/66272 , H01L21/8222 , H01L29/72 , H01L29/7325
摘要： The invention deals with a semiconductor device which comprises a semiconductor substrate (11) of a first conductivity type, a semiconductor region (14, 15) formed on said substrate, and a first insulation film (120, 77) provided between said semiconductor region and said semiconductor substrate, wherein said semiconductor substrate is isolated by said insulation film from a polycrystalline silicon layer (79, 121) formed in the periphery of said semiconductor region (14, 15) thereby to reduce the parasitic capacitance, and wherein said insulation film (79, 121) is stretched and arranged on the lower side of said semiconductor region.
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5.发明公开Semiconductor device having increased immunity against alpha-particles and external noise 失效具有对ALPHA颗粒和外部噪声增加的免疫力的半导体器件
公开(公告)号：EP0182067A3
公开(公告)日：1987-08-12
申请号：EP85112753
申请日：1985-10-08
申请人： HITACHI, LTD.
发明人： Sagara, Kazuhiko , Nakamura, Tohru , Nakazato, Kazuo , Kure, Tokuo , Ikeda, Kiyoji , Homma, Noriyuki
IPC分类号： H01L27/10
CPC分类号： H01L27/1025 , H01L21/74 , H01L21/762 , Y10S257/906
摘要： A semiconductor device includes a layer (3) doped with impurities, provided between a buried layer (2) and an epitaxial layer (4), and having a conductivity of the type opposite to that of said buried layer (2) and said epitaxial layer (4). A reversely biasing voltage is applied across the buried layer (2) and the doped layer (3). Side surfaces of the epitaxial layer (4) are surrounded by an insulator (7). This helps effectively to prevent any element (10...14) formed in the epitaxial layer (4) from being affected by a-particles and greatly improves the reliability of the semiconductor device.
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公开(公告)号：EP0152116A2
公开(公告)日：1985-08-21
申请号：EP85101688.1
申请日：1985-02-15
申请人： HITACHI, LTD.
IPC分类号： H01L29/73 , H01L29/10 , H01L21/225 , H01L21/316
CPC分类号： H01L21/28525 , H01L21/2257 , H01L29/1008 , H01L29/735
摘要： 57 A lateral bipolar transistor affording a good controllability for a base length is disclosed.
In fabricating a lateral bipolar transistor by forming a single crystal column (15) and disposing heavily doped polycrystalline regions (21E,21C) on both sides of the column (15). contact surfaces between the single crystal column (15) and the heavily doped polycrystalline regions (21E,21C) are controlled by etching of an oxide film (61). The etching of the oxide film (61) can provide a device of a precision higher than attained by controlling any other element.-
公开(公告)号：EP0661561A2
公开(公告)日：1995-07-05
申请号：EP94309625.5
申请日：1994-12-21
申请人： HITACHI, LTD.
CPC分类号： G02B6/125 , G02B6/12004 , G02B6/122 , G02B6/132
摘要： An integrated optical waveguide device includes a substrate (1), and an optical waveguide which is formed in the form of projection or is formed in a trench formed in the substrate. Each optical waveguide has a first optical area (2) made of a first optical material and a second optical area (3) which is made of a second optical material and is surrounded by the first optical area. The optical waveguides are arranged on both side faces of the projection or trench.
摘要翻译： 本发明提供一种集成型光波导装置，其包括基板（1）和形成为突起状的光波导路，或者在形成于基板的槽中形成的光波导路。 每个光波导具有由第一光学材料制成的第一光学区域（2）和由第二光学材料制成并由第一光学区域围绕的第二光学区域（3）。 光波导布置在突起或沟槽的两个侧面上。
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公开(公告)号：EP0078501A3
公开(公告)日：1986-06-04
申请号：EP82109931
申请日：1982-10-27
申请人： Hitachi, Ltd.
发明人： Nakazato, Kazuo , Nakamura, Tohru , Matsuda, Masatoshi , Miyazaki, Takao , Kure, Tokuo , Okabe, Takahiro , Nagata, Minoru
IPC分类号： H01L29/08
CPC分类号： H01L29/66272 , H01L21/033 , H01L29/42304 , H01L29/72 , H01L29/732 , H01L29/735
摘要： A semiconductor device wherein the active regions of a transistor are formed in an opening provided in an insulating film (17, 19, 110) electrodes (10, 10', 10") are led out by a polycrystalline silicon film (18) formed on the insulating film, and the upper surfaces of the emitter and base electrodes and the exposed surface of the insulating film are substantially even.
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9.发明公开Semiconductor integrated circuit including series connected transistors 失效Integrierte Halbleiterschaltung mit in Serie geschalteten Transistoren。
公开(公告)号：EP0140369A1
公开(公告)日：1985-05-08
申请号：EP84113062.8
申请日：1984-10-30
申请人： HITACHI, LTD.
IPC分类号： H01L27/08
CPC分类号： H01L27/0828 , H01L29/7327
摘要： According to a semiconductor integrated circuit ot the present invention, a normal transistor (Q 2 ; Q 4 ) and an inverse transistor (Q 1 ; Q 3 ) are formed in a single isolated region, and both the bipolar transistors are connected in series and used in the integrated circuit, thereby to enhance the density of integration.
Besides, in the semiconductor integrated circuit of the present invention, the collector region of the normal transistor (Q 2 ; Q 4 ) and the emitter region of the inverse transistor (Q 1 ; Q 3 ) are disposed as a common region.摘要翻译： 根据本发明的半导体集成电路，在单个隔离区域中形成正常晶体管（Q2; Q4）和反相晶体管（Q1; Q3），并且两个双极晶体管串联连接并用于集成 电路，从而提高集成密度。 此外，在本发明的半导体集成电路中，将普通晶体管（Q2; Q4）的集电极区域和反相晶体管（Q1; Q3）的发射极区域设置为公共区域。
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公开(公告)号：EP0661561B1
公开(公告)日：2000-03-29
申请号：EP94309625.5
申请日：1994-12-21
申请人： HITACHI, LTD.
CPC分类号： G02B6/125 , G02B6/12004 , G02B6/122 , G02B6/132
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