摘要:
Even in such an arrangement in which the throttle valve (115) is operated independently of the engine control system (200), abnormal engine behavior is ensured to be detected such that a necessary fail-safe operation should be taken. The arrangement of the invention is comprised of the electronically controlled throttle system (100), engine control system (200) and engine speed monitoring unit (280), wherein the electronically controlled throttle system (100) is allowed to monitor engine behaviors. Thereby, in the case when the throttle valve (115) is operated independently of the engine control system (200), if its engine behavior becomes abnormal relative to its drive contents, the engine system senses the abnormality, and takes a fail-safe operation such as to stop operation of the throttle valve (115) and the like.
摘要:
Even in such an arrangement in which the throttle valve (115) is operated independently of the engine control system (200), abnormal engine behavior is ensured to be detected such that a necessary fail-safe operation should be taken. The arrangement of the invention is comprised of the electronically controlled throttle system (100), engine control system (200) and engine speed monitoring unit (280), wherein the electronically controlled throttle system (100) is allowed to monitor engine behaviors. Thereby, in the case when the throttle valve (115) is operated independently of the engine control system (200), if its engine behavior becomes abnormal relative to its drive contents, the engine system senses the abnormality, and takes a fail-safe operation such as to stop operation of the throttle valve (115) and the like.
摘要:
Even in such an arrangement in which the throttle valve (115) is operated independently of the engine control system (200), abnormal engine behavior is ensured to be detected such that a necessary fail-safe operation should be taken. The arrangement of the invention is comprised of the electronically controlled throttle system (100), engine control system (200) and engine speed monitoring unit (280), wherein the electronically controlled throttle system (100) is allowed to monitor engine behaviors. Thereby, in the case when the throttle valve (115) is operated independently of the engine control system (200), if its engine behavior becomes abnormal relative to its drive contents, the engine system senses the abnormality, and takes a fail-safe operation such as to stop operation of the throttle valve (115) and the like.
摘要:
A semiconductor device comprises an embedded insulation layer (101) formed on a semiconductor substrate (100), plural power semiconductor elements (2, 3) formed on a semiconductor substrate (100) on the embedded insulation layer, a trench (4) formed on the semiconductor substrate and isolating between the power semiconductor elements, and an isolator (5) insulating and driving control electrodes of the power semiconductor elements, and the power semiconductor elements (2, 3) such as transistors can be used, being connected to each other in series.
摘要:
A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting an instruction format of a fixed length of 2 n bits which is smaller than the length of the maximum data word fed to instruction execution means. The control of the coded division is executed by noting the code bits.
摘要:
A microcomputer MCU adopting the general purpose register method is enabled to have a small program capacity or a high program memory using efficiency and low system cost, while enjoying the advantage of simplification of the instruction decoding as in the RISC machine having a fixed length instruction format of the prior art, by adopting an instruction format of a fixed length of 2 n bits which is smaller than the length of the maximum data word fed to instruction execution means. The control of the coded division is executed by noting the code bits.
摘要:
A data processor comprises a bus control circuit (14) adapted to be interfaced with a synchronous DRAM (22) which can be accessed in synchronism with a clock signal (CLK), a plurality of data processing modules (12, 13) coupled to said bus control circuit (14) for producing data and addresses for accessing a memory (22), and a clock driver (16) for feeding intrinsic operation clocks to said data processing modules (12, 13) and for feeding the clock signal for accessing said memory (22) in synchronism with the operations of said data processing modules (12, 13) to be operated by the operation clock signals, to the outside.