公开(公告)号：EP2198457A2

公开(公告)日：2010-06-23

申请号：EP08838789.9

申请日：2008-09-23

申请人： Micron Technology, INC.

发明人： MIN, Kyu, S. ,  BREWER, Rhett, T. ,  KRISHNAMOHAN, Tejas ,  GRAETTINGER, Thomas, M. ,  RAMASWANY, D., V., Nirmal ,  WEIMER, Ronald, A. ,  BHATTACHARYYA, Arup

IPC分类号： H01L27/115

CPC分类号： G11C16/0483 ,  B82Y10/00 ,  G11C11/5671 ,  G11C16/0475 ,  G11C2216/06 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/42348 ,  Y10S977/943

摘要： Some embodiments include memory cells having vertically-stacked charge-trapping zones spaced from one another by dielectric material. The dielectric material may comprise high-k material. One or more of the charge-trapping zones may comprise metallic material. Such metallic material may be present as a plurality of discrete isolated islands, such as nanodots. Some embodiments include methods of forming memory cells in which two charge-trapping zones are formed over tunnel dielectric, with the zones being vertically displaced relative to one another, and with the zone closest to the tunnel dielectric having deeper traps than the other zone. Some embodiments include electronic systems comprising memory cells. Some embodiments include methods of programming memory cells having vertically-stacked charge-trapping zones.

公开(公告)号：EP1660698A1

公开(公告)日：2006-05-31

申请号：EP04781653.3

申请日：2004-08-18

申请人： MICRON TECHNOLOGY, INC.

发明人： ZHENG, Lingyi, A. ,  DOAN, Trung, T. ,  BREINER, Lyle, D. ,  PING, Er-Xuan ,  WEIMER, Ronald, A. ,  KUBISTA, David, J. ,  BEAMAN, Kevin, L. ,  BASCERI, Cem

IPC分类号： C23C16/458

CPC分类号： C23C16/4583 ,  C23C16/45546 ,  C23C16/45578 ,  Y10S206/832

摘要： The present disclosure describes apparatus and methods for processing microfeature workpieces, e.g., by depositing material on a microelectronic semiconductor using atomic layer deposition. Some of these apparatus include microfeature workpiece holders that include gas distributors. One exemplary implementation provides a microfeature workpiece holder adapted to hold a plurality of microfeature workpieces. This workpiece holder includes a plurality of workpiece supports and a gas distributor. The workpiece supports are adapted to support a plurality of microfeature workpieces in a spaced-apart relationship to define a process space adjacent a surface of each microfeature workpiece. The gas distributor includes an inlet and a plurality of outlets, with each of the outlets positioned to direct a flow of process gas into one of the process spaces.

公开(公告)号：EP1604392B1

公开(公告)日：2011-11-23

申请号：EP04716958.6

申请日：2004-03-03

申请人： Micron Technology, Inc.

发明人： EPPICH, Denise, M. ,  WEIMER, Ronald, A.

IPC分类号： H01L21/28 ,  H01L29/49 ,  H01L21/8238

CPC分类号： H01L21/28194 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28097 ,  H01L21/28167 ,  H01L21/28202 ,  H01L27/0629 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/84 ,  H01L28/90 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： The invention includes methods of forming circuit devices. A metal-containing material comprising a thickness of no more than 20Å (or alternatively comprising a thickness resulting from no more than 70 ALD cycles) is formed between conductively-doped silicon and a dielectric layer. The conductively-doped silicon can be n-type silicon and the dielectric layer can be a high-k dielectric material. The metal-containing material can be formed directily on the dielectric layer, and the conductively-doped silicon can be formed directly on the metal-containing material. The circuit device can be a capacitor construction or a transistor construction. If the circuit device is a transistor construction, such can be incorporated into a CMOS assembly. Various devices of the present invention can be incorporated into memory constructions, and can be incorporated into electronic systems.

摘要翻译： 本发明包括形成电路器件的方法。 在导电掺杂的硅与介电层之间形成厚度不超过20埃（或者包含不超过70个ALD循环所得厚度）的含金属材料。 导电掺杂的硅可以是n型硅，介电层可以是高k介电材料。 含金属材料可以直接形成在介电层上，并且可以直接在含金属材料上形成导电掺杂硅。 电路装置可以是电容器结构或晶体管结构。 如果电路器件是晶体管结构，则可以将其结合到CMOS组件中。 本发明的各种设备可以结合到存储器结构中，并且可以结合到电子系统中。

公开(公告)号：EP1652223B1

公开(公告)日：2012-09-19

申请号：EP04777378.3

申请日：2004-06-30

申请人： Micron Technology, Inc.

发明人： WEIMER, Ronald, A. ,  BREINER, Lyle, D.

IPC分类号： H01L21/314 ,  H01L21/336 ,  H01L21/28 ,  H01L21/8242 ,  C23C16/30 ,  C23C16/34 ,  H01L21/318

CPC分类号： H01L21/0214 ,  C23C16/308 ,  C23C16/345 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/3144 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/10873 ,  H01L27/11 ,  H01L29/513 ,  H01L29/6659 ,  H01L29/66825

摘要： The invention includes methods of forming deuterated silicon nitride-containing materials from at least one deuterated nitrogen compound in combination with one or more silicon-containing compounds that do not contain hydrogen isotopes. Suitable deuterated nitrogen compounds can comprise, for example, NH 2 D, NHD 2 and ND 3 . Suitable silicon-containing compounds include, for example, SiCl 4 and Si 2 Cl 6 . Deuterated silicon nitride-containing materials of the present invention can be incorporated into, for example, transistor devices. The transistor devices can be utilized in DRAM cells, which in turn can be utilized in electronic systems.

公开(公告)号：EP1660698B1

公开(公告)日：2008-06-04

申请号：EP04781653.3

申请日：2004-08-18

申请人： Micron Technology, Inc.

发明人： ZHENG, Lingyi, A. ,  DOAN, Trung, T. ,  BREINER, Lyle, D. ,  PING, Er-Xuan ,  WEIMER, Ronald, A. ,  KUBISTA, David, J. ,  BEAMAN, Kevin, L. ,  BASCERI, Cem

IPC分类号： C23C16/458

CPC分类号： C23C16/4583 ,  C23C16/45546 ,  C23C16/45578 ,  Y10S206/832

摘要： The present disclosure describes apparatus and methods for processing microfeature workpieces, e.g., by depositing material on a microelectronic semiconductor using atomic layer deposition. Some of these apparatus include microfeature workpiece holders that include gas distributors. One exemplary implementation provides a microfeature workpiece holder adapted to hold a plurality of microfeature workpieces. This workpiece holder includes a plurality of workpiece supports and a gas distributor. The workpiece supports are adapted to support a plurality of microfeature workpieces in a spaced-apart relationship to define a process space adjacent a surface of each microfeature workpiece. The gas distributor includes an inlet and a plurality of outlets, with each of the outlets positioned to direct a flow of process gas into one of the process spaces.

公开(公告)号：EP1652223A2

公开(公告)日：2006-05-03

申请号：EP04777378.3

申请日：2004-06-30

申请人： MICRON TECHNOLOGY, INC.

发明人： WEIMER, Ronald, A. ,  BREINER, Lyle, D.

IPC分类号： H01L21/314 ,  H01L21/28 ,  H01L21/8242 ,  H01L21/336

CPC分类号： H01L21/0214 ,  C23C16/308 ,  C23C16/345 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02271 ,  H01L21/0228 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/3003 ,  H01L21/3144 ,  H01L21/3145 ,  H01L21/3185 ,  H01L27/10873 ,  H01L27/11 ,  H01L29/513 ,  H01L29/6659 ,  H01L29/66825

摘要： The invention includes methods of forming deuterated silicon nitride-containing materials from at least one deuterated nitrogen compound in combination with one or more silicon-containing compounds that do not contain hydrogen isotopes. Suitable deuterated nitrogen compounds can comprise, for example, NH 2 D, NHD 2 and ND 3 . Suitable silicon-containing compounds include, for example, SiCl 4 and Si 2 Cl 6 . Deuterated silicon nitride-containing materials of the present invention can be incorporated into, for example, transistor devices. The transistor devices can be utilized in DRAM cells, which in turn can be utilized in electronic systems.

公开(公告)号：EP1604392A1

公开(公告)日：2005-12-14

申请号：EP04716958.6

申请日：2004-03-03

申请人： MICRON TECHNOLOGY, INC.

发明人： EPPICH, Denise, M. ,  WEIMER, Ronald, A.

IPC分类号： H01L21/28 ,  H01L29/49

CPC分类号： H01L21/28194 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28097 ,  H01L21/28167 ,  H01L21/28202 ,  H01L27/0629 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/84 ,  H01L28/90 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： The invention includes methods of forming circuit devices. A metal-containing material comprising a thickness of no more than 20Å (or alternatively comprising a thickness resulting from no more than 70 ALD cycles) is formed between conductively-doped silicon and a dielectric layer. The conductively-doped silicon can be n-type silicon and the dielectric layer can be a high-k dielectric material. The metal-containing material can be formed directily on the dielectric layer, and the conductively-doped silicon can be formed directly on the metal-containing material. The circuit device can be a capacitor construction or a transistor construction. If the circuit device is a transistor construction, such can be incorporated into a CMOS assembly. Various devices of the present invention can be incorporated into memory constructions, and can be incorporated into electronic systems.

摘要翻译： 本发明包括形成电路器件的方法。 在导电掺杂的硅与介电层之间形成厚度不超过20埃（或者包含不超过70个ALD循环所得厚度）的含金属材料。 导电掺杂的硅可以是n型硅，介电层可以是高k介电材料。 含金属材料可以直接形成在介电层上，并且可以直接在含金属材料上形成导电掺杂硅。 电路装置可以是电容器结构或晶体管结构。 如果电路器件是晶体管结构，则可以将其结合到CMOS组件中。 本发明的各种设备可以结合到存储器结构中，并且可以结合到电子系统中。