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公开(公告)号：EP0110635A1
公开(公告)日：1984-06-13
申请号：EP83307044.4
申请日：1983-11-18
申请人： PRUTEC LIMITED
CPC分类号： H01L24/85 , C08F299/026 , H01B3/40 , H01B13/16 , H01L24/48 , H01L24/78 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/78301 , H01L2224/8502 , H01L2224/85181 , H01L2924/00014 , H01L2924/01014 , H01L2924/01033 , H01L2924/01054 , H01L2924/01057 , H01L2924/01075 , H01L2924/10253 , H01L2924/14 , H01L2924/19042 , H01R43/02 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： The invention relates to a method of wire bonding in which the wire is coated with a polymerisable material which is cured by exposure to radiation after the wire bond has been formed. In this way the wire is insulated so as to enable a higher interconnection density without risk of short circuit.
The invention also relates to apperatus for putting the above method into practice. The bonding wire passes through a capillary tube (10') in the base of a reservoir (40) filled with the polymerisable material. In this way the wire is coated but the liquid does not escape from the reservoir (40).摘要翻译： 本发明涉及一种引线接合方法，其中线材涂覆有可聚合材料，该可聚合材料在形成引线接合之后通过暴露于辐射而固化。 以这种方式，电线是绝缘的，以便能够实现更高的互连密度而没有短路的风险。 本发明还涉及将上述方法付诸实践的方法。 接合线通过填充有可聚合材料的储存器（40）的基部中的毛细管（10分钟）。 以这种方式，电线被涂覆，但是液体不会从储存器40逸出。
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公开(公告)号：EP0110285A3
公开(公告)日：1985-11-21
申请号：EP83111625
申请日：1983-11-21
申请人： PRUTEC LIMITED
IPC分类号： H01L23/52 , H01L21/58 , H01L21/312 , H01L21/90
CPC分类号： H01L23/4828 , H01L21/312 , H01L23/538 , H01L23/5389 , H01L24/24 , H01L24/29 , H01L24/82 , H01L24/83 , H01L24/96 , H01L2224/24137 , H01L2224/2919 , H01L2224/8319 , H01L2224/8385 , H01L2224/92 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/19042 , H01L2924/19043 , H01L2224/96 , H01L2224/82 , H01L2924/00
摘要： The invention describes a method of producing an electrical circuit incorporating integrated circuits on semiconductor chips, which comprises mounting the electrical components (10) which are to constitute the circuit including the unpackaged semiconductor chips on an insulating substrate (12) in such a manner that the contact areas of the components lie in a substantially flat plane, and depositing a conductive pattern over the substrate to establish electrical connection between the components of the circuit.
摘要翻译： 本发明描述了一种制造在半导体芯片上并入有集成电路的电路的方法，其包括将构成包括未封装的半导体芯片的电路的电气部件（10）安装在绝缘基板（12）上，使得 部件的接触区域位于基本上平坦的平面中，并且在衬底上沉积导电图案以建立电路部件之间的电连接。
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公开(公告)号：EP0110285A2
公开(公告)日：1984-06-13
申请号：EP83111625.6
申请日：1983-11-21
申请人： PRUTEC LIMITED
CPC分类号： H01L23/4828 , H01L21/312 , H01L23/538 , H01L23/5389 , H01L24/24 , H01L24/29 , H01L24/82 , H01L24/83 , H01L24/96 , H01L2224/24137 , H01L2224/2919 , H01L2224/8319 , H01L2224/8385 , H01L2224/92 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/19042 , H01L2924/19043 , H01L2224/96 , H01L2224/82 , H01L2924/00
摘要： The invention describes a method of producing an electrical circuit incorporating integrated circuits on semiconductor chips, which comprises mounting the electrical components (10) which are to constitute the circuit including the unpackaged semiconductor chips on an insulating substrate (12) in such a manner that the contact areas of the components lie in a substantially flat plane, and depositing a conductive pattern over the substrate to establish electrical connection between the components of the circuit.
摘要翻译： 本发明描述了一种制造在半导体芯片上并入有集成电路的电路的方法，其包括将构成包括未封装的半导体芯片的电路的电气部件（10）安装在绝缘基板（12）上，使得 部件的接触区域位于基本上平坦的平面中，并且在衬底上沉积导电图案以建立电路部件之间的电连接。
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