公开(公告)号：EP2562800A3

公开(公告)日：2013-11-13

申请号：EP12181406.5

申请日：2012-08-22

申请人： Palo Alto Research Center Incorporated

发明人： KRUSOR, Brent S. ,  CHUA, Christopher L ,  WUNDERER, Thomas ,  JOHNSON, Noble M. ,  CHENG, Bowen

IPC分类号： H01L21/66 ,  H01L33/00 ,  H01L21/67

CPC分类号： H01L22/26 ,  H01L21/67086 ,  H01L21/67253 ,  H01L22/12 ,  H01L33/0079

摘要： Approaches for substantially removing bulk aluminum nitride (140) from one or more layers (150) epitaxially grown on the bulk aluminum nitride (AIN) are discussed. The bulk AIN (140) is exposed to an etchant during an etching process. During the etching process, the thickness of the bulk AIN can be measured and used to control etching.

公开(公告)号：EP3657539A1

公开(公告)日：2020-05-27

申请号：EP19213869.1

申请日：2017-10-19

申请人： Palo Alto Research Center, Incorporated

发明人： KRUSOR, Brent S. ,  MEI, Ping

IPC分类号： H01L21/98 ,  H01L21/67 ,  H01L21/60

摘要： A method for substantially simultaneously bonding multiple semiconductor chips (116A, 116B) of different height profiles on a flexible substrate (100) comprises: providing a flexible substrate (100) with printed conductive traces (102);
placing an anisotropic conductive adhesive (ACA) (104) over at least portions of the printed conductive traces (102) of the flexible substrate (100), the ACA (104) including a thermosetting adhesive and conductive spherical elements;
tacking the ACA (104) in place by application of heat and pressure for a predetermined time;
positioning and orientating a first side of each of multiple semiconductor chips (116A, 116B) to align with selected locations of the printed conductive traces (102) of the flexible substrate (100) lying under the ACA (104), wherein at least one of the multiple semiconductor chips (116A, 116B) has a height profile different from at least one other one of the multiple semiconductor chips (116A, 116B);
curing the thermosetting adhesive of the ACA (104) by applying heat and pressure, wherein the pressure is applied, with a deformable bonding head (206) (a compliant plug made of e.g. neoprene rubber), an expandable elastic membrane (304) or a plurality of movable pins (402, 506) held in a support structure (e.g., a pin screen) (404) in combination with an elastic plug (406) or with an elastic membrane (502), to a second side of each of the multiple semiconductor chips (116A, 116B), the applying of the pressure pressing and deforming the conductive spherical elements of the ACA (104), wherein electrical contact is made between the semiconductor chips (116A, 116B) and at least portions of the printed conductive traces (102).
A corresponding semiconductor chip bonding device (200, 300, 400, 500) is also disclosed.

公开(公告)号：EP3312877A2

公开(公告)日：2018-04-25

申请号：EP17197418.1

申请日：2017-10-19

申请人： Palo Alto Research Center, Incorporated

发明人： KRUSOR, Brent S. ,  MEI, Ping

IPC分类号： H01L21/98 ,  H01L21/67 ,  H01L21/60

CPC分类号： H01L24/97 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/27003 ,  H01L2224/2731 ,  H01L2224/27334 ,  H01L2224/2783 ,  H01L2224/27848 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/75251 ,  H01L2224/75312 ,  H01L2224/75314 ,  H01L2224/75315 ,  H01L2224/75316 ,  H01L2224/75318 ,  H01L2224/7532 ,  H01L2224/75824 ,  H01L2224/7598 ,  H01L2224/83121 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2224/95091 ,  H01L2224/95121 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/00012

摘要： A method for substantially simultaneously bonding multiple semiconductor chips (116A, 116B) of different height profiles on a flexible substrate (100) comprises:
providing a flexible substrate (100) with printed conductive traces (102);
placing an anisotropic conductive adhesive (ACA) (104) over at least portions of the printed conductive traces (102) of the flexible substrate (100), the ACA (104) including a thermosetting adhesive and conductive spherical elements;
tacking the ACA (104) in place by application of heat and pressure for a predetermined time;
positioning and orientating a first side of each of multiple semiconductor chips (116A, 116B) to align with selected locations of the printed conductive traces (102) of the flexible substrate (100) lying under the ACA (104), wherein at least one of the multiple semiconductor chips (116A, 116B) has a height profile different from at least one other one of the multiple semiconductor chips (116A, 116B);
curing the thermosetting adhesive of the ACA (104) by applying heat and pressure, wherein the pressure is applied, with a deformable bonding head (206), an expandable elastic membrane (304) or a plurality of movable pins (402) held in a support structure (e.g., a pin screen) (404), to a second side of each of the multiple semiconductor chips (116A, 116B), the applying of the pressure pressing and deforming the conductive spherical elements of the ACA (104), wherein electrical contact is made between the semiconductor chips (116A, 116B) and at least portions of the printed conductive traces (102).
A corresponding semiconductor chip bonding device (200, 300, 400) is also disclosed.

摘要翻译： 一种用于在柔性基板（100）上基本上同时结合不同高度轮廓的多个半导体芯片（116A，116B）的方法包括：提供具有印刷导电迹线（102）的柔性基板（100）; 将各向异性导电粘合剂（ACA）（104）置于所述柔性衬底（100）的所述印刷导电迹线（102）的至少部分之上，所述ACA（104）包括热固性粘合剂和导电球形元件; 通过加热和加压预定时间将ACA（104）固定就位; 将多个半导体芯片（116A，116B）中的每一个的第一侧定位和定向成与位于ACA（104）下方的柔性衬底（100）的印刷导电迹线（102）的选定位置对齐，其中至少一个 所述多个半导体芯片（116A，116B）具有与所述多个半导体芯片（116A，116B）中的至少另一个不同的高度分布; （206），可膨胀弹性膜（304）或多个可移动销（402），通过施加热和压力来固化ACA（104）的热固性粘合剂，其中施加压力，所述可变形粘合头 （104）的导电球形元件的压力加压和变形施加到多个半导体芯片（116A，116B）中的每一个的第二侧，支撑结构（例如销屏）（404） 在半导体芯片（116A，116B）与至少部分印刷导电迹线（102）之间形成电接触。 还公开了相应的半导体芯片键合装置（200,300,400）。

公开(公告)号：EP3188220A3

公开(公告)日：2017-12-13

申请号：EP16202082.0

申请日：2016-12-02

申请人： Palo Alto Research Center, Incorporated

发明人： NG, Tse Nga ,  MEI, Ping ,  KRUSOR, Brent S. ,  WHITING, Gregory L. ,  READY, Steven E. ,  VERES, Janos

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/48

CPC分类号： H05K1/028 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/76 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24105 ,  H01L2224/24991 ,  H01L2224/76151 ,  H01L2224/76155 ,  H01L2224/76252 ,  H01L2224/82051 ,  H01L2224/82181 ,  H01L2224/8285 ,  H01L2224/82986 ,  H05K1/0326 ,  H05K1/185 ,  H05K3/14

摘要： Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among other configurations, to form electronic assemblies. The surface of the electronic circuit component carries electronic elements such as conductive traces and/or other configurations including contact pads. A method for forming an electronic assembly includes providing a tacky layer (302A). Then an electronic circuit component (304A) is provided having a first side and a second side, where the first side carries the electronic elements. The first side of the electronic circuit component (304A) is positioned into contact with the tacky layer (302A). A bonding material (306A) is then deposited to a portion of the adhesive layer (302A) that is not covered by the first side of the electronic circuit component (304A), to a depth which is sufficient to cover at least a portion of the electronic circuit component (304A). The bonding material (306A) is then fixed or cured into a fixed or cured bonding material, and the tacky layer (302A) is removed. By these operations, the electronic circuit component is held in a secure attachment by the fixed or cured bonding material (306A), and circuit connections (308B) may be made.

公开(公告)号：EP2562800A2

公开(公告)日：2013-02-27

申请号：EP12181406.5

申请日：2012-08-22

申请人： Palo Alto Research Center Incorporated

发明人： KRUSOR, Brent S. ,  CHUA, Christopher L ,  WUNDERER, Thomas ,  JOHNSON, Noble M. ,  CHENG, Bowen

IPC分类号： H01L21/66

CPC分类号： H01L22/26 ,  H01L21/67086 ,  H01L21/67253 ,  H01L22/12 ,  H01L33/0079

摘要： Approaches for substantially removing bulk aluminum nitride (140) from one or more layers (150) epitaxially grown on the bulk aluminum nitride (AIN) are discussed. The bulk AIN (140) is exposed to an etchant during an etching process. During the etching process, the thickness of the bulk AIN can be measured and used to control etching.

摘要翻译： 讨论了从在块状氮化铝（AlN）上外延生长的一个或多个层（150）基本去除块状氮化铝（140）的方法。 在蚀刻过程中，块体AIN（140）暴露于蚀刻剂。 在蚀刻过程中，可以测量体AIN的厚度并用于控制蚀刻。

公开(公告)号：EP3312877A3

公开(公告)日：2018-08-08

申请号：EP17197418.1

申请日：2017-10-19

申请人： Palo Alto Research Center, Incorporated

发明人： KRUSOR, Brent S. ,  MEI, Ping

IPC分类号： H01L21/98 ,  H01L21/67 ,  H01L21/60

CPC分类号： H01L24/97 ,  H01L24/27 ,  H01L24/29 ,  H01L24/743 ,  H01L24/75 ,  H01L24/83 ,  H01L2224/27003 ,  H01L2224/2731 ,  H01L2224/27334 ,  H01L2224/2783 ,  H01L2224/27848 ,  H01L2224/2929 ,  H01L2224/29291 ,  H01L2224/293 ,  H01L2224/75251 ,  H01L2224/75312 ,  H01L2224/75314 ,  H01L2224/75315 ,  H01L2224/75316 ,  H01L2224/75318 ,  H01L2224/7532 ,  H01L2224/75824 ,  H01L2224/7598 ,  H01L2224/83121 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/83851 ,  H01L2224/83862 ,  H01L2224/95091 ,  H01L2224/95121 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2924/00012

摘要： A method for substantially simultaneously bonding multiple semiconductor chips (116A, 116B) of different height profiles on a flexible substrate (100) comprises:
providing a flexible substrate (100) with printed conductive traces (102);
placing an anisotropic conductive adhesive (ACA) (104) over at least portions of the printed conductive traces (102) of the flexible substrate (100), the ACA (104) including a thermosetting adhesive and conductive spherical elements;
tacking the ACA (104) in place by application of heat and pressure for a predetermined time;
positioning and orientating a first side of each of multiple semiconductor chips (116A, 116B) to align with selected locations of the printed conductive traces (102) of the flexible substrate (100) lying under the ACA (104), wherein at least one of the multiple semiconductor chips (116A, 116B) has a height profile different from at least one other one of the multiple semiconductor chips (116A, 116B);
curing the thermosetting adhesive of the ACA (104) by applying heat and pressure, wherein the pressure is applied, with a deformable bonding head (206), an expandable elastic membrane (304) or a plurality of movable pins (402) held in a support structure (e.g., a pin screen) (404), to a second side of each of the multiple semiconductor chips (116A, 116B), the applying of the pressure pressing and deforming the conductive spherical elements of the ACA (104), wherein electrical contact is made between the semiconductor chips (116A, 116B) and at least portions of the printed conductive traces (102).
A corresponding semiconductor chip bonding device (200, 300, 400) is also disclosed.

公开(公告)号：EP3188220A2

公开(公告)日：2017-07-05

申请号：EP16202082.0

申请日：2016-12-02

申请人： Palo Alto Research Center, Incorporated

发明人： NG, Tse Nga ,  MEI, Ping ,  KRUSOR, Brent S. ,  WHITING, Gregory L. ,  READY, Steven E. ,  VERES, Janos

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/48

CPC分类号： H05K1/028 ,  H01L21/568 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/76 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/24011 ,  H01L2224/24051 ,  H01L2224/24105 ,  H01L2224/24991 ,  H01L2224/76151 ,  H01L2224/76155 ,  H01L2224/76252 ,  H01L2224/82051 ,  H01L2224/82181 ,  H01L2224/8285 ,  H01L2224/82986 ,  H05K1/0326 ,  H05K1/185 ,  H05K3/14

摘要： Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among other configurations, to form electronic assemblies. The surface of the electronic circuit component carries electronic elements such as conductive traces and/or other configurations including contact pads. A method for forming an electronic assembly includes providing a tacky layer (302A). Then an electronic circuit component (304A) is provided having a first side and a second side, where the first side carries the electronic elements. The first side of the electronic circuit component (304A) is positioned into contact with the tacky layer (302A). A bonding material (306A) is then deposited to a portion of the adhesive layer (302A) that is not covered by the first side of the electronic circuit component (304A), to a depth which is sufficient to cover at least a portion of the electronic circuit component (304A). The bonding material (306A) is then fixed or cured into a fixed or cured bonding material, and the tacky layer (302A) is removed. By these operations, the electronic circuit component is held in a secure attachment by the fixed or cured bonding material (306A), and circuit connections (308B) may be made.

摘要翻译： 提供用于电子电路组件的制造工艺，以形成电子组件，所述电子电路组件例如裸管芯和封装集成芯片等。 电子电路部件的表面承载电子元件，例如导电迹线和/或包括接触垫的其它构造。 形成电子组件的方法包括提供粘性层（302A）。 然后提供具有第一侧和第二侧的电子电路组件（304A），其中第一侧承载电子元件。 电子电路部件（304A）的第一侧被定位成与发粘层（302A）接触。 然后将结合材料（306A）沉积到未被电子电路部件（304A）的第一侧所覆盖的粘合剂层（302A）的一部分，深度足以覆盖至少一部分 电子电路组件（304A）。 然后将结合材料（306A）固定或固化成固定或固化的结合材料，并且去除发粘层（302A）。 通过这些操作，电子电路部件通过固定或固化的结合材料（306A）保持固定连接，并且可以形成电路连接（308B）。

公开(公告)号：EP3131114A1

公开(公告)日：2017-02-15

申请号：EP16183143.3

申请日：2016-08-05

申请人： Palo Alto Research Center, Incorporated

发明人： MEI, Ping ,  WHITING, Gregory L. ,  KRUSOR, Brent S.

IPC分类号： H01L21/60 ,  H01L23/498 ,  H01L23/13 ,  H01L21/683 ,  H05K3/22 ,  H05K1/18

CPC分类号： H05K3/306 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/49838 ,  H01L23/4985 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/19 ,  H01L2924/19105 ,  H05K1/183 ,  H05K1/184 ,  H05K3/0017 ,  H05K3/0026 ,  H05K3/0044 ,  H05K3/125 ,  H05K3/1275 ,  H05K3/284 ,  H05K3/305 ,  H05K2201/0133 ,  H05K2203/1327 ,  Y02P70/613

摘要： Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among others, where the surface of the electronic circuit component is at the same level as the associated substrate, the surface of the electronic circuit component holding connection pads. A gap exists between the electronic circuit component, and the end of an opening within the substrate. This gap is filled with a filler material, such as a bonding material. The bonding material also used to encapsulate or bond together the back side of the substrate and electronic circuit component. During the manufacturing process, the front surface of the electronic circuit component (which includes the contact pads) and the front surface of the substrate which includes electronic circuitry are held in an adhesive relationship by a flat material having an upper surface which includes adhesive or sticky material (such as PDMS). Once the flat material is removed the planar flat or level upper surface can readily accept the formation of conductive traces by the use of inkjet printing or other technologies.

摘要翻译： 本发明提供一种电子电路部件的制造方法，例如裸片和封装的集成芯片，其中电子电路部件的表面与相关的基板处于同一水平，电子电路部件的表面保持连接焊盘 。 电子电路部件与基板内的开口端部之间存在间隙。 该间隙填充有诸如粘合材料的填充材料。 接合材料也用于将基板和电子电路部件的背面封装或粘合在一起。 在制造过程中，电子电路部件（其包括接触焊盘）的前表面和包括电子电路的基板的前表面通过具有上表面的扁平材料保持粘合关系，该上表面包括粘合或粘性 材料（如PDMS）。 一旦平面材料被去除，平面平坦或平坦的上表面就可以通过使用喷墨印刷或其他技术容易地接受导电迹线的形成。