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    Nonvolatile memory device comprising a switching device and a resistant material and method of manufacturing the same
    2.
    发明公开
    Nonvolatile memory device comprising a switching device and a resistant material and method of manufacturing the same 有权
    具有用于它们的制备的开关装置和一个耐热材料和过程的非易失性存储器设备

    公开(公告)号：EP1947696A1

    公开(公告)日：2008-07-23

    申请号：EP08155548.4

    申请日：2004-05-27

    申请人： Samsung Electronics Co., Ltd

    发明人： Seo, Sun-ae ,  Yoo, In-kyeong ,  Lee, Myoung-jae ,  Park, Wan-jun

    IPC分类号： H01L27/24 ,  H01L45/00

    CPC分类号： G11C13/0007 ,  G11C2213/32 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146

    摘要： A nonvolatile memory device comprises a substrate, a diode with a switching function formed on the substrate, and a data storage unit connected to the diode. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges. The data storage material layer has a first resistance when a write voltage V w1 (0 1 w1 2 ) is applied to the data storage material layer, the first resistance representing a first data state. The data storage material layer has a second resistance different from the first resistance when a write voltage V 3 (V 2 3 ) is applied to the data storage material layer, the second resistance representing a second data state. The first and second data states are readable from the data storage material layer by application of a read voltage V R (V R 1 |) to the data storage material layer without altering the data state of the data storage material layer.

    摘要翻译： 一种非易失性存储装置包括基板，与形成在基片上开关功能的二极管，和连接到所述二极管的数据存储单元。 所述数据存储单元包括具有在不同的电压范围不同的电阻特性的数据存储材料层。 当写入电压V W1（0

    Silicon nano wires, semiconductor device including the same, and method of manufacturing the silicon nano wires
    3.
    发明公开
    Silicon nano wires, semiconductor device including the same, and method of manufacturing the silicon nano wires 审中-公开
    硅纳米线，半导体装置，例如，和用于制造硅纳米线的方法

    公开(公告)号：EP1696473A2

    公开(公告)日：2006-08-30

    申请号：EP06250998.9

    申请日：2006-02-24

    申请人： Samsung Electronics Co., Ltd.

    发明人： Choi, Byoung-lyong ,  Lee, Eun-kyung ,  Park, Wan-jun ,  Hyun, Jae-woong

    IPC分类号： H01L21/20 ,  H01L29/12

    CPC分类号： B82Y10/00 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/861

    摘要： The present invention provides silicon nano wires, a semiconductor device including the silicon nano wires, and a method of manufacturing the silicon nano wires. The method includes: forming microgrooves having a plurality of microcavities, the microgrooves forming a regular pattern on a surface of a silicon substrate, forming a first doping layer doped with a first dopant in the silicon substrate, and forming a second doping layer doped with a second dopant between the first doping layer and a surface of the silicon substrate; forming a metal layer on the silicon substrate by depositing a material which acts as a catalyst to form nano wires on the silicon substrate; forming the catalysts by heating the metal layer so that the metal layer within the microgrooves on the surface of the silicon substrate is agglomerated; and growing the nano wires between the catalysts and the silicon substrate using a thermal process.

    摘要翻译： 本发明提供的硅纳米线，半导体器件包括硅纳米线，以及制造该硅纳米线的方法。 该方法包括：形成具有微腔的多个微槽，形成了硅衬底的表面上以规则的图案，形成在所述硅衬底掺杂有第一掺杂剂的第一掺杂层;以及形成第二掺杂层中的微槽掺杂有 第一掺杂层和所述硅衬底的表面之间的第二掺杂剂; 上形成通过沉积其充当催化剂以在硅衬底的纳米线的材料的硅衬底的金属层; 通过加热金属层形成该催化剂，从而硅衬底附聚的表面上的细微槽内所做的金属层; 和不断增长的催化剂，并使用热工艺在硅衬底之间的纳米线。

    High-density magnetic random access memory device and method of operating the same
    5.
    发明公开
    High-density magnetic random access memory device and method of operating the same 审中-公开
    Hochdichte magnetische Direktzufriffspeicheranordnung und Verfahren zu deren Betrieb

    公开(公告)号：EP1329895A2

    公开(公告)日：2003-07-23

    申请号：EP02256805.9

    申请日：2002-09-30

    申请人： SAMSUNG ELECTRONICS Co. Ltd.

    发明人： Kim, Tae-wan 4-808 Samho Apt. ,  Park, Sang-jin ,  Park, Wan-jun ,  Song, I-hun

    IPC分类号： G11C11/16

    CPC分类号： G11C11/16

    摘要： A high-density magnetic memory device is provided. The high-density magnetic memory device includes a vertical transistor formed on a substrate; a magnetic memory element formed on the vertical transistor, the magnetic memory element using magnetic materials for storing data; a bit line connected to the transistor via the magnetic memory element; a word line for writing over and across the bit line; and an insulating layer formed between the word line for writing, and the other components below the word line for writing. According to the high-density magnetic memory device, it is possible to fabricate a high-density magnetic memory device with a vertical transistor.

    摘要翻译： 提供了一种高密度磁存储器件。 高密度磁存储器件包括形成在衬底上的垂直晶体管; 形成在所述垂直晶体管上的磁存储元件，所述磁存储元件使用用于存储数据的磁性材料; 经由磁存储元件连接到晶体管的位线; 用于写入和跨越位线的字线; 以及形成在用于写入的字线之间的绝缘层，以及用于写入的字线下方的其他部件。 根据高密度磁存储器件，可以制造具有垂直晶体管的高密度磁存储器件。

    Magnetic random access memory and method of reading data from the same
    10.
    发明公开
    Magnetic random access memory and method of reading data from the same 有权
    Magnetischer Direktzugriffsspeicher sowie entsprechendes Leseverfahren

    公开(公告)号：EP1564750A2

    公开(公告)日：2005-08-17

    申请号：EP04258119.9

    申请日：2004-12-24

    申请人： Samsung Electronics Co., Ltd.

    发明人： Park, Wan-jun ,  Kim, Tae-wan ,  Park, Sang-jin ,  Kim, Dae-jeong ,  Lee, Seung-jun, Dep. of Information Electronics ,  Shin, Hyung-soon, Dep.of Information Electronics

    IPC分类号： G11C11/16

    CPC分类号： G11C7/14 ,  G11C7/062 ,  G11C11/1659 ,  G11C11/1673

    摘要： A magnetic random access memory (MRAM) comprising a memory cell (C2) having one transistor (58) and one magnetic tunneling junction (MTJ) layer (58) and a reference cell (C1) which is used as a basis when reading data stored in the memory cell, wherein the reference cell comprises first (50) and second (52) MTJ layers provided in parallel to each other; and first (54) and second (56) transistors provided in parallel to each other, the first and second transistors being respectively connected in serial to the first and second MTJ layers, and a method of reading data from the MRAM are provided. The first and second transistors can be substituted for one transistor having a driving capability corresponding to twice the driving capability of a transistor of the memory cell. In addition, the position of the first and second transistors and the position of the first and second MTJ layers can be opposite.

    摘要翻译： 包括具有一个晶体管（58）和一个磁性隧道结（MTJ）层（58）的存储单元（C2）和参考单元（C1）的磁性随机存取存储器（MRAM），其被用作读取存储的数据时的基础 在所述存储单元中，其中所述参考单元包括彼此平行设置的第一（50）和第二（52）MTJ层; 和彼此并联设置的第一（54）和第二（56）晶体管，第一和第二晶体管分别串联连接到第一和第二MTJ层，并且提供了从MRAM读取数据的方法。 第一和第二晶体管可以代替具有对应于存储器单元的晶体管的驱动能力的两倍的驱动能力的一个晶体管。 此外，第一和第二晶体管的位置以及第一和第二MTJ层的位置可以相反。