公开(公告)号：EP1139353A3

公开(公告)日：2004-01-21

申请号：EP01301805.6

申请日：2001-02-28

Applicant: VICTOR COMPANY OF JAPAN, LTD.

Inventor： Shindoh, Motoshi ,  Segawa, Keiji ,  Otsuki, Mitsuru

IPC: H01C1/032 ,  H01C7/00 ,  H01C17/075

CPC classification number: H05K1/167 ,  H01C17/12 ,  H05K1/0206 ,  H05K1/165 ,  H05K3/388 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2203/0361 ,  Y10T29/49082

Abstract: The invention provides a production method capable of forming a thin film resistance element having a thickness and a shape controlled in a high accuracy in a printed circuit board (core material). The production method of a thin film resistance element formed on a printed circuit board, has the steps of forming a thin film resistance layer having a predetermined thickness on the printed circuit board through an insulation layer by a dry process used in producing a semiconductor, forming an electrically conductive layer on the thin resistance layer, and etching the electrically conductive layer selectively so as to make, at least, a pair of electrically conductive pads, resulting in the thin film resistance element having a predetermined value of resistivity between the pair of electrically conductive pads. Thereby, it is possible to form the thin film resistance element having a thickness and a shape controlled in a high accuracy on the printed circuit board (core material).

公开(公告)号：EP1196013A3

公开(公告)日：2003-06-18

申请号：EP01308135.1

申请日：2001-09-25

Applicant: VICTOR COMPANY OF JAPAN, LTD.

Inventor： Ozeki, Masahiro ,  Shindoh, Motoshi ,  Ryu, Hiroyuki

IPC: H05K1/02

CPC classification number: H05K1/0221 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2924/1903 ,  H05K3/4644 ,  H05K2201/09036 ,  H05K2201/09981

Abstract: In a printed circuit board comprising an insulative substrate 20, a first conductive layer 22 and a first insulative layer 23 formed on the insulative substrate 20 in order, a circuit pattern 25 provided in parallel with the longitudinal direction of the first conductive layer 22 and a second insulative layer 26, the printed circuit board is further composed of a plurality of grooves 27L and 27R formed on both sides of the circuit pattern 25 in the first and second insulative layers 23 and 26 so as to expose the first conductive layer 22 and a second conductive layer 28, which is formed on the second insulative layer 26 continuously from an inner wall of the one groove 27L to an inner wall of the other groove 27R so as to connect to the conductive layer 22. The conductive layer 28 connected to the conductive layer 22 through the first and second insulative layers 23 and 26 forms a structure of surrounding the circuit pattern 25.

公开(公告)号：EP1196013A2

公开(公告)日：2002-04-10

申请号：EP01308135.1

申请日：2001-09-25

Applicant: VICTOR COMPANY OF JAPAN, LTD.

Inventor： Ozeki, Masahiro ,  Shindoh, Motoshi ,  Ryu, Hiroyuki

IPC: H05K1/02

CPC classification number: H05K1/0221 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2924/1903 ,  H05K3/4644 ,  H05K2201/09036 ,  H05K2201/09981

Abstract: In a printed circuit board comprising an insulative substrate 20, a first conductive layer 22 and a first insulative layer 23 formed on the insulative substrate 20 in order, a circuit pattern 25 provided in parallel with the longitudinal direction of the first conductive layer 22 and a second insulative layer 26, the printed circuit board is further composed of a plurality of grooves 27L and 27R formed on both sides of the circuit pattern 25 in the first and second insulative layers 23 and 26 so as to expose the first conductive layer 22 and a second conductive layer 28, which is formed on the second insulative layer 26 continuously from an inner wall of the one groove 27L to an inner wall of the other groove 27R so as to connect to the conductive layer 22. The conductive layer 28 connected to the conductive layer 22 through the first and second insulative layers 23 and 26 forms a structure of surrounding the circuit pattern 25.

Abstract translation: 在印刷电路板，包括绝缘性基板20，第一导电层22和形成在为了在绝缘20个衬底的第一绝缘层23，电路图案25在平行于第一导电层22和一个的长度方向上设置 第二绝缘层26，印刷电路板被进一步由形成在所述第一和第二绝缘层23和电路图形25的bothsides 26，以便槽27L和27R的多个，以暴露第一导电层22和一个 形成在第二绝缘层26上连续形成从该一个凹槽27L的内壁向其它槽27R的内壁，以便连接到导电层22连接到导电层28第二导电层28，所有 导电层22通过第一和第二绝缘层23和26所形成周边电路图案25。的结构

公开(公告)号：EP1139353A2

公开(公告)日：2001-10-04

申请号：EP01301805.6

申请日：2001-02-28

Applicant: VICTOR COMPANY OF JAPAN, LTD.

Inventor： Shindoh, Motoshi ,  Segawa, Keiji ,  Otsuki, Mitsuru

IPC: H01C7/18

CPC classification number: H05K1/167 ,  H01C17/12 ,  H05K1/0206 ,  H05K1/165 ,  H05K3/388 ,  H05K3/4644 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0187 ,  H05K2201/0209 ,  H05K2201/0317 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2203/0361 ,  Y10T29/49082

Abstract: The invention provides a production method capable of forming a thin film resistance element having a thickness and a shape controlled in a high accuracy in a printed circuit board (core material). The production method of a thin film resistance element formed on a printed circuit board, has the steps of forming a thin film resistance layer having a predetermined thickness on the printed circuit board through an insulation layer by a dry process used in producing a semiconductor, forming an electrically conductive layer on the thin resistance layer, and etching the electrically conductive layer selectively so as to make, at least, a pair of electrically conductive pads, resulting in the thin film resistance element having a predetermined value of resistivity between the pair of electrically conductive pads. Thereby, it is possible to form the thin film resistance element having a thickness and a shape controlled in a high accuracy on the printed circuit board (core material).

Abstract translation: 本发明提供一种能够形成具有一定厚度和在印刷电路板（芯材）的高精确度控制的形状的薄膜电阻元件的制造方法。 形成在印刷电路板的薄膜电阻元件的制造方法，具有形成在制造半导体使用的干法具有通过向绝缘层上的印刷电路板的预定厚度的薄膜电阻层的工序，形成 薄电阻层上的导电层，并且选择性地蚀刻导电层，以使至少一对导电焊盘，在薄膜电阻元件所得到的具有一对电之间的电阻率的预定值 导电衬垫。 由此，可以形成具有厚度和在高精度地控制在印刷电路板（芯材）的形状的薄膜电阻元件。