公开(公告)号：EP3321767A4

公开(公告)日：2018-05-16

申请号：EP15902472

申请日：2015-12-30

申请人： HUAWEI TECH CO LTD

发明人： LI ZHIBING ,  YI YONGJIANG

IPC分类号： G06F1/30 ,  G06F1/32 ,  G11C14/00

CPC分类号： G06F3/0625 ,  G06F1/30 ,  G06F1/305 ,  G06F1/3225 ,  G06F1/3275 ,  G06F3/0655 ,  G06F3/0679 ,  G06F9/4411 ,  G11C5/141 ,  G11C14/0009 ,  Y02D10/13 ,  Y02D10/14

摘要： Embodiments of the present invention provide a method for reducing power consumption of a memory, and a computer device. The memory includes at least two channels, each channel includes at least two storage units, a dirty data storage area is set in the memory, and the dirty data storage area includes at least one storage unit in each channel. When the computer device determines that data to be operated in a received data operation request is dirty data, the dirty data is stored in the dirty data storage area. After the computer device encounters a power failure, a backup power supply is turned on to supply power to the memory, then the storage unit included in the dirty data storage area is caused to enter a normal operating state, and a storage unit outside the dirty data storage area in the memory is caused to enter a self-refreshing state. Data in the dirty data storage area is then written to a non-volatile storage area of the computer device. By using the present invention, power consumption of a memory during a process of using a backup power supply can be effectively reduced.

公开(公告)号：EP2191532A4

公开(公告)日：2015-03-04

申请号：EP08732916

申请日：2008-03-27

申请人： LSI CORP

发明人： ANUPINDI LAKSHMANA M ,  SKINNER BRIAN

IPC分类号： H01M10/42 ,  G06F1/26 ,  G11C5/14 ,  H01M10/46 ,  H01M10/48

CPC分类号： H01M10/46 ,  G06F1/263 ,  G11C5/141 ,  H01M10/4207 ,  H01M10/482 ,  H01M2220/10 ,  Y10T307/344 ,  Y10T307/359 ,  Y10T307/391 ,  Y10T307/505 ,  Y10T307/527

公开(公告)号：EP2476039A4

公开(公告)日：2014-03-05

申请号：EP10816108

申请日：2010-09-09

申请人： FUSION IO INC

发明人： SMITH LANCE ,  FILLINGIM JEREMY ,  FLYNN DAVID ,  INSKEEP BILL ,  STRASSER JOHN ,  THATCHER JONATHAN

IPC分类号： G06F1/32 ,  G06F1/26 ,  G06F13/14

CPC分类号： G11C5/141 ,  G06F1/30 ,  G06F11/1048 ,  G06F11/1076 ,  G06F11/1441 ,  G06F11/1471 ,  G06F11/2015 ,  G06F11/3034 ,  G06F11/3058 ,  G06F2201/81 ,  G11C16/10 ,  G11C16/30

公开(公告)号：EP1979910B1

公开(公告)日：2011-05-18

申请号：EP07802731.5

申请日：2007-08-20

申请人： Continental Automotive GmbH

发明人： HOFFMANN, Klaus ,  LITTWIN, Jürgen ,  NÄTHER, Horst ,  OBERGFELL, Armin

IPC分类号： G11C5/14 ,  G11C5/00 ,  G07C5/08 ,  G01C22/02

CPC分类号： G01C22/02 ,  G11C5/141 ,  G11C5/143

摘要： The invention relates to a method, particularly in a tachograph (1) for a motor vehicle, for controlling access to a data store (4) which has a first memory area (2) and a second memory area (3) in an electronic circuit (5). To increase data integrity, the invention proposes that the first memory area (2) be provided for storing data which are to be protected with a higher level of security and that the second memory area (3) be provided for storing data which are to be protected with a lower level of security, that a supply voltage be measured and that if the supply voltage is below a prescribed first voltage threshold then access to the first memory area (2) is blocked. The invention also relates to an apparatus, particularly a tachograph (1) for a motor vehicle, for carrying out the aforementioned method with an electronic circuit (5) which has a data store (4).

公开(公告)号：EP1843353A2

公开(公告)日：2007-10-10

申请号：EP07011464.0

申请日：1998-04-17

申请人： Saehan Information System Inc., ,  SigmaTel, Inc.

发明人： Moon, Kwang-su ,  Hwang, Jung-ha

IPC分类号： G11C7/00 ,  G11C5/14

CPC分类号： G11C7/16 ,  G06T9/007 ,  G11B20/10 ,  G11B27/105 ,  G11B2020/00014 ,  G11B2020/00057 ,  G11B2020/10546 ,  G11B2220/61 ,  G11C5/141 ,  G11C7/1006 ,  G11C2207/16

摘要： Disclosed is an MPEG portable sound reproducing system and a method for reproducing sound data compressed using the MPEG method, The inventive system includes power supply means for supplying operational power to the system, the power supply means being realized through a secondary battery; power processing means for rectifying power supplied from the power supply means to stable voltage and current; information display means for displaying numbers and combinations of letters related to operational states of the system; control means for controlling all operations of converting and reproducing sound data compressed using the MPEG method; data storage means for storing MPEG-compressed sound data in a designated address according to signals output from the control means; information selecting means for selecting general operations to reproduce, download, and apply selected sound data stored in the data storage means; sound reproducing means for converting sound data stored in the data storage means into a format audible to users according to signals output from the control means; and transmitting/receiving means for transmitting and receiving sound data and program data from external devices.

摘要翻译： 本发明的系统包括用于向系统提供操作电力的电源装置，通过二次电池实现电源装置; 电力处理装置，用于将从电源装置提供的电力整流到稳定的电压和电流; 用于显示与系统的操作状态相关的字母的数字和组合的信息显示装置; 控制装置，用于控制使用MPEG方法压缩的声音数据的转换和再现的所有操作; 数据存储装置，用于根据从控制装置输出的信号将MPEG压缩声音数据存储在指定地址中; 信息选择装置，用于选择一般操作以再现，下载和应用存储在数据存储装置中的所选声音数据; 声音再现装置，用于根据从控制装置输出的信号将存储在数据存储装置中的声音数据转换成用户听到的格式; 以及用于从外部设备发送和接收声音数据和节目数据的发送/接收装置。

公开(公告)号：EP1788574A1

公开(公告)日：2007-05-23

申请号：EP05025054.7

申请日：2005-11-16

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Donderer, Markus

IPC分类号： G11C5/14

CPC分类号： G11C5/141

摘要： Die Erfindung betrifft ein elektrisches Gerät (1) mit einem I2C EEPROM (3) als Speichermedium, mit dem eine Taktleitung (5) und eine Datenleitung (6) elektrisch verbunden sind. Ein erster Anschluss (7) und ein zweiter Anschluss (8) sind von außen zugänglich und ermöglich in Verbindung mit einem Kondensator (11) zur Pufferung des I2C EEPROMs (3) das Auslesen der in diesem gespeicherten Daten mit Hilfe eines Schreib-/Lesegeräts.

摘要翻译： 电源单元（4）连接控制器（2）和电EEPROM（I2C EEPROM）（3）。 时钟线（5）和数据线（6）与电源单元连接。 电阻器与数据线和时钟线电连接。 外部可访问的端子（7,8）连接到时钟和数据线，并且在电源单元和电阻器的电连接之间布置有去耦二极管。 电容器（11）电连接到I2C EEPROM的电源端子。

公开(公告)号：EP1672765A1

公开(公告)日：2006-06-21

申请号：EP03748539.8

申请日：2003-09-18

申请人： Hitachi, Ltd. ,  Hitachi Car Engineering Co., Ltd.

发明人： MATSUMOTO, Masahiro, c/o Hitachi Ltd, Int.Prop.Gr. ,  HANZAWA, Keiji, c/o Hitachi Car Engineering Co Ltd ,  SUKESAKO, Hiroyasu, c/o Hitachi Ltd., Int.Prop.Gr.

IPC分类号： H02J9/06 ,  H02J9/00

CPC分类号： G11C5/141 ,  G11C5/143 ,  H02J7/345 ,  H02J9/061 ,  Y10T307/615

摘要： A backup circuit that can be fabricated by the standard CMOS process and has a small circuit scale. The backup circuit (10) is disposed between a digital circuit (20) including a storage circuit and a power supply terminal (T IN . T GND ) for supplying power to the digital circuit. MOS transistors (MOS1, MOS2) connected in series are disposed between the power supply terminal (T IN , T GND ) and a backup capacitor (C1). The MOS transistors (MOS1, MOS2) serve as resistors when the power is normally supplied to the power supply terminal, and as diodes each operating with its backward direction defined as the direction from the digital circuit toward the power supply terminal when the power is cut off.

摘要翻译： 一种备用电路，可以通过标准CMOS工艺制造，并具有小的电路规模。 备用电路（10）设置在包括存储电路的数字电路（20）和用于向数字电路供电的电源端子（T IN。T GND）之间。 串联连接的MOS晶体管（MOS1，MOS2）配置在电源端子（T IN，T GND）和备用电容器（C1）之间。 MOS晶体管（MOS1，MOS2）在电源正常供给电源端子时用作电阻器，并且当电源切断时，作为从其数字电路朝向电源端子的方向定义为其反向方向的二极管 关闭。

公开(公告)号：EP1293985A4

公开(公告)日：2005-11-02

申请号：EP00935591

申请日：2000-06-08

申请人： MITSUBISHI ELECTRIC CORP

发明人： YOKOYAMA CHIKARA ,  FUNABA Y

IPC分类号： G11C5/14 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/401 ,  G06F1/32

CPC分类号： G11C11/4074 ,  G11C5/141 ,  G11C5/147 ,  G11C11/406

摘要： When a power detector (5) detects a command for turning a battery (2) off, a DRAM (1) is switched to self-refresh mode and supplied with power from a backup power supply (4). A step-up/step-down power supply (2) includes a step-up DC/DC converter for increasing input voltage and produces output, and a step-down DC/DC converter connected in series with the step-up converter to decrease input voltage.

摘要翻译： 当电源检测单元在电池2的OFF命令5所检测，一个DRAM 1改变为自刷新模式。 然后，电力从备用电源4供给到DRAM 1.

公开(公告)号：EP1357557A1

公开(公告)日：2003-10-29

申请号：EP02394043.0

申请日：2002-04-24

申请人： Excellatron Solid State, LLC

发明人： Johnson, Lonnie G.

IPC分类号： G11C11/412 ,  H03K17/16 ,  H01L23/58

CPC分类号： H01M6/40 ,  G11C5/005 ,  G11C5/141 ,  G11C11/4125 ,  H01L2924/0002 ,  H01L2924/00

摘要： Systems and methods for an integrated circuit that reduces switching noise including an inverter network having at least two transistors, a micro-battery, such as a thin film battery, coupled to the inverter network and a resistor coupled at one end to the micro-battery and connected to a power source at the other end. When the transistors transition from one logic state to another logic state, for a period of time more than one transistor is turned on. Unless controlled, this state produces a high amount of current and a resultant voltage spike. The current demanded during this transition period is drawn from the micro-battery preventing a peak voltage flowing to and disrupting the analog components. The battery re-charges gradually and thus, no voltage spike occurs. Further, integrated circuit components are isolated from the power line by the resistor that limits the current drawn on the line

摘要翻译： 用于在集成电路的系统和方法做了减少在逆变器网络具有至少两个晶体管，微电池，彩色切换噪声包括：如薄膜电池，耦合到逆变器的网络和在一端连接到微电池的电阻器 并连接到在另一端的电源。 当从一个逻辑状态到另一个逻辑状态的晶体管过渡，用于在一段时间内超过一个晶体管多个导通。 除非控制，这个状态产生的电流的高量和尖峰电压生成。 在这个过渡期间所要求的电流从微电池防止峰值电压流向和破坏模拟组件绘制。 电池再充电渐渐并因此没有电压尖峰的发生。 此外，集成电路组件从由电阻器电源线隔离限制汲取的电流做就行

公开(公告)号：EP0826218B1

公开(公告)日：2003-05-21

申请号：EP97915885.4

申请日：1997-03-07

申请人： International Business Machines Corporation

发明人： LIONG, Thomas, Singkiat ,  RAO, Krishnakumar ,  GUPTA, Parveen, Kumar

IPC分类号： G11C7/00 ,  G11C5/14

CPC分类号： G06F11/2015 ,  G06F1/30 ,  G11C5/141

摘要： A method and apparatus providing a battery backup for a dynamic random access memory (DRAM) cache system (150) that senses the Vcc level supplied through the cache controller (160) to the cache memory (200) and, if Vcc falls below a preset threshold level, the battery backup apparatus (176) switches the cache memory array (200) to a backup battery Vcc source, and a backup refresh control generator unit (177) that is also powered by the backup battery Vcc source. The cache DRAM (200), backup battery (176), and backup refresh generator (177) are physically contained in a single module that can be disconnected from the cache controller (160) and host system (100) while preserving the cache memory contents. The backup system (170) is installed in an operating host system for recovery of the cache memory contents and/or resumption of execution of the program that was running when the Vcc power failure occurred.