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    MICROCOMPUTER FOR MICROPHONE
    1.
    发明公开
    MICROCOMPUTER FOR MICROPHONE 审中-公开

    公开(公告)号：EP3244308A4

    公开(公告)日：2018-01-17

    申请号：EP15876768

    申请日：2015-11-17

    Applicant: PANASONIC IP MAN CO LTD

    Inventor： TAKEMOTO MAKOTO ,  KATO AKIHIRO

    IPC: G06F9/50 ,  G06F12/02

    CPC classification number: H03M1/001 ,  G06F9/50 ,  G06F12/02 ,  H04R3/005 ,  H04R2430/20

    Abstract: The objective of the present invention is to make it possible to execute each of a plurality of application programs without taking into account the addresses of the programs. A microcomputer (100) is provided with: a program memory (108) which stores a plurality of microphone programs executed by a digital signal processing circuit (104); an address control circuit (109) which controls addresses in the program memory; a program address register (110) which stores the addresses of the microphone programs; and a program size register (111) which stores the sizes of the microphone programs. The address control circuit (109) calculates the addresses in the program memory on the basis of the program address register (110) and the program size register (111).

    DYNAMIC COMPRESSION/DECOMPRESSION (CODEC) CONFIGURATION
    2.
    发明公开
    DYNAMIC COMPRESSION/DECOMPRESSION (CODEC) CONFIGURATION 审中-公开
    DYNAMISCHE KOMPRESSIONS- / DEKOMPRESSIONSKONFIGURATION（CODEC）

    公开(公告)号：EP3014774A4

    公开(公告)日：2017-04-05

    申请号：EP13888501

    申请日：2013-06-24

    Applicant: INTEL CORP

    Inventor： JIN ZHONGHUI ,  QIAO NAN

    IPC: H03M7/30

    CPC classification number: H03M7/6047 ,  H03M1/001 ,  H03M1/002 ,  H03M7/30 ,  H03M7/6058 ,  H03M7/6064

    Abstract: The present disclosure is directed dynamic compression/decompression (codec) configuration. In general, a device may include a codec configuration module to determine a configuration for use by the codec based on configuration criteria. The configuration criteria may include, for example, data characteristic information, system condition information and user expectation information. The configuration information may be used to select a codec configuration from one or more available codec configurations. For example, a benchmark module also in the device may determine the available codec configurations. After a codec configuration has been selected, it may be set in the codec. It may also be possible for the codec configuration module to monitor for changes in device operation (e.g., changes in the configuration criteria) and to update the codec configuration based on the monitored changes.

    Abstract translation: 本公开涉及动态压缩/解压缩（编解码器）配置。 通常，设备可以包括编解码器配置模块，以基于配置标准来确定供编解码器使用的配置。 配置标准可以包括例如数据特征信息，系统状况信息和用户期望信息。 配置信息可用于从一个或多个可用编解码器配置中选择编解码器配置。 例如，设备中的基准模块也可以确定可用的编解码器配置。 编解码器配置选定后，可以在编解码器中设置。 编解码器配置模块也可以监视设备操作中的变化（例如，配置标准中的变化）并且基于所监视的变化来更新编解码器配置。

    MICROCOMPUTER FOR MICROPHONE
    4.
    发明公开
    MICROCOMPUTER FOR MICROPHONE 审中-公开
    微型计算机用微型计算机

    公开(公告)号：EP3244308A1

    公开(公告)日：2017-11-15

    申请号：EP15876768.1

    申请日：2015-11-17

    Applicant: Panasonic Intellectual Property Management Co., Ltd.

    Inventor： TAKEMOTO, Makoto ,  KATO, Akihiro

    IPC: G06F9/50 ,  G06F12/02

    CPC classification number: H03M1/001 ,  G06F9/50 ,  G06F12/02 ,  H04R3/005 ,  H04R2430/20

    Abstract: The objective of the present invention is to make it possible to execute each of a plurality of application programs without taking into account the addresses of the programs. A microcomputer (100) is provided with: a program memory (108) which stores a plurality of microphone programs executed by a digital signal processing circuit (104); an address control circuit (109) which controls addresses in the program memory; a program address register (110) which stores the addresses of the microphone programs; and a program size register (111) which stores the sizes of the microphone programs. The address control circuit (109) calculates the addresses in the program memory on the basis of the program address register (110) and the program size register (111).

    Abstract translation: 本发明的目的是使得可以在不考虑程序的地址的情况下执行多个应用程序中的每一个。 微计算机（100）具有：存储由数字信号处理电路（104）执行的多个麦克风程序的程序存储器（108）; 地址控制电路（109），其控制程序存储器中的地址; 程序地址寄存器（110），其存储麦克风程序的地址; 和存储麦克风程序大小的程序大小寄存器（111）。 地址控制电路（109）根据程序地址寄存器（110）和程序大小寄存器（111）计算程序存储器中的地址。

    SIGNAL CONVERSION CIRCUIT AND FINGERPRINT RECOGNITION SYSTEM
    6.
    发明公开
    SIGNAL CONVERSION CIRCUIT AND FINGERPRINT RECOGNITION SYSTEM 审中-公开

    公开(公告)号：EP3367572A1

    公开(公告)日：2018-08-29

    申请号：EP16856556.2

    申请日：2016-01-21

    Applicant: Shenzhen Goodix Technology Co., Ltd.

    Inventor： TAN, Bo ,  ZHAN, Chang

    IPC: H03M1/12 ,  G06K9/00

    CPC classification number: G06K9/001 ,  G06K9/0002 ,  G06K9/0008 ,  G06K9/6202 ,  H03M1/001 ,  H03M1/002 ,  H03M1/148 ,  H03M1/368 ,  H03M1/56

    Abstract: The present invention provides a signal conversion circuit and fingerprint identification system. The signal conversion circuit is configured to generate a first digital signal according to a first analog signal, and includes a comparator and counter. The comparator includes a first input terminal configured to receive the first analog signal, a second input terminal connected to a reference voltage generator and configured to receive a reference voltage, and an output terminal configured to output a second digital signal. The counter is connected to the output terminal, and is configured to generate a first digital signal. The signal conversion circuit according to the present invention has the advantages of simple circuit structure, small circuit area, low cost and low power consumption.

    DISPOSITIF DE COMMUNICATION PAR COURANTS PORTEURS EN LIGNE ET MULTIPLEXAGE FRÉQUENTIEL DANS UNE LIGNE PILOTE, ET SYSTÈMES ASSOCIÉS
    9.
    发明公开
    DISPOSITIF DE COMMUNICATION PAR COURANTS PORTEURS EN LIGNE ET MULTIPLEXAGE FRÉQUENTIEL DANS UNE LIGNE PILOTE, ET SYSTÈMES ASSOCIÉS 审中-公开
    通信设备可以使用电力线通信频率复用方法是在控制线路及相关系统

    公开(公告)号：EP2761717A1

    公开(公告)日：2014-08-06

    申请号：EP12773088.5

    申请日：2012-09-26

    Applicant: Peugeot Citroën Automobiles SA

    Inventor： MORAND, Nicolas

    IPC: H02J7/00 ,  B60L11/18 ,  B60R16/03 ,  H04B3/54 ,  H02J7/08

    CPC classification number: H04B3/542 ,  B60L11/1838 ,  B60L2200/26 ,  B60R16/00 ,  B60R16/03 ,  H02J7/04 ,  H03M1/001 ,  H04B3/546 ,  H04B2203/5408 ,  H04B2203/5429 ,  H04B2203/5458 ,  H04B2203/547 ,  Y02T10/7005 ,  Y02T10/7072 ,  Y02T90/121 ,  Y02T90/128 ,  Y02T90/14 ,  Y02T90/16 ,  Y02T90/163

    Abstract: The invention relates to a communication device using power line communication (D1) provided in one system (S1) coupled to another system (S2) via a power cable (CE) comprising a pilot line (LP) having a first impedance, which encounters at least second and third impedances and through which a first analog signal passes in a first frequency band. Said device (D1) is arranged so as to: i) generate, from a local digital signal, a second analog power line communication signal having frequencies included in a second frequency band that has minimal overlap with the first frequency band; ii) supply the second analog signal to the pilot line (LP) via a capacitive means (C1); and iii) extract, from the analog signals passing through the pilot line (LP), each second analog signal in order to convert the latter into a digital signal to be processed by the system (S1).

    Abstract translation: 本发明涉及使用在经由电力电缆耦合到第二系统中的第一系统，包括具有第一阻抗，至少第二和第三阻抗哪个遇到并且通过该第一模拟信号通过先导管路提供电力线通信的通信设备 在第一频带。 该装置被布置为：ⅰ）生成，从本地数字信号，包括在第二频率具有频率的第二模拟电力线通信信号带那样具有与第一频率频带 - 最小重叠; ⅱ）通过电容装置提供第二模拟信号以导频线和iii）中提取，从通过先导管路的模拟信号，以便将后者转换成数字信号，每个第二模拟信号以由所述系统处理的 ，

    RECEIVER CIRCUITS WITH FEEDFORWARD SIGNAL PATH
    10.
    发明公开
    RECEIVER CIRCUITS WITH FEEDFORWARD SIGNAL PATH 审中-公开
    接收器电路与前馈信号路径

    公开(公告)号：EP3240197A1

    公开(公告)日：2017-11-01

    申请号：EP16167566.5

    申请日：2016-04-28

    Applicant: NXP B.V.

    Inventor： Bolatkale, Muhammed ,  Breems, Lucien Johannes

    IPC: H04B1/10 ,  H04B1/12

    CPC classification number: H04L25/08 ,  H03M1/001 ,  H03M1/1009 ,  H04B1/0007 ,  H04B1/109 ,  H04B1/123

    Abstract: A receiver circuit comprising: an input terminal configured to receive an input-signal; a feedforward-ADC configured to provide a feedforward-digital-signal based on the input-signal; a feedforward-DAC configured to provide a feedforward-analogue-signal based on the feedforward-digital-signal; a feedforward-subtractor configured to provide an error-signal based on the difference between the feedforward-analogue-signal and the input-signal; an error-LNA configured to provide an amplified-error-signal based on the error-signal; an error-ADC configured to provide a digital-amplified-error-signal based on the amplified-error-signal; a mixer configured to down-convert a signal in a signal path between the input terminal and the error-ADC; and an error-cancellation-block configured to provide an error-cancelled-signal based on a difference between the digital-amplified-error-signal and the feedforward-digital-signal.

    Abstract translation: 一种接收器电路，包括：输入端，被配置为接收输入信号; 前馈ADC，被配置为基于输入信号提供前馈数字信号; 前馈DAC，被配置为基于前馈数字信号提供前馈模拟信号; 前馈减法器，被配置为基于前馈模拟信号和输入信号之间的差值提供误差信号; 误差LNA，被配置为基于误差信号提供放大的误差信号; 误差ADC，被配置为基于放大的误差信号提供数字放大的误差信号; 混频器，被配置为对输入端和误差ADC之间的信号路径中的信号进行下变频; 以及错误消除块，被配置为基于数字放大错误信号和前馈数字信号之间的差提供错误消除信号。

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