公开(公告)号：EP4415268A1

公开(公告)日：2024-08-14

申请号：EP23156114.3

申请日：2023-02-10

申请人： NXP B.V.

发明人： Hardeman,, Gijsbert Willem ,  Rutten,, Robert ,  Pol,, Evert-Jan Daniel ,  Liu,, Qilong ,  Bajoria,, Shagun ,  Breems,, Lucien Johannes

IPC分类号： H03M1/10 ,  H03M1/14 ,  H03M3/00

CPC分类号： H03M1/1033 ,  H03M1/14 ,  H03M3/414

摘要： A detector device for calibrating a digital filter to replicate a transfer function of a signal processing apparatus, comprising: a first input to receive a first signal; a second input configured to receive a response signal of the signal processing apparatus to the first signal; a controllable FIR filter; a comparison-block to compare the phase and amplitude after a correction has been applied by the controllable FIR filter; a feedback loop; and an interpolation-block; wherein the at least one detector is configured to determine, at least, the feedback control signal at a first frequency and at a second frequency, and wherein the interpolation-block is configured to interpolate to determine calibration information for programming of the transfer function of said digital filter.

公开(公告)号：EP3339885A1

公开(公告)日：2018-06-27

申请号：EP16205847.3

申请日：2016-12-21

申请人： Hexagon Technology Center GmbH

发明人： BESTLER, Simon ,  WOHLGENANNT, Rainer ,  HINDERLING, Jürg

IPC分类号： G01S7/486 ,  H03M1/12 ,  H03M1/14 ,  H03M1/10 ,  G01S17/10

CPC分类号： G01S7/4861 ,  G01S7/497 ,  G01S17/10 ,  H03M1/0641 ,  H03M1/1033 ,  H03M1/1042 ,  H03M1/121 ,  H03M1/14

摘要： Die vorliegende Erfindung betrifft eine Distanzmessmethode und ein elektronisches Laserdistanzmessmodul, insbesondere zur Verwendung in einem Distanzmessgerät, im Speziellen ausgebildet als Lasertracker, Tachymeter, Laserscanner, oder Profiler, zur schnellen Signalerfassung mit einem Analog-Digital-Wandler, wobei eine Kompensation einer Integralen Nichtlinearität des Analog-Digital-Wandlers erfolgt.

公开(公告)号：EP2933925B1

公开(公告)日：2018-03-28

申请号：EP15163376.5

申请日：2015-04-13

申请人： STMicroelectronics S.r.l.

发明人： Giacomini, Mauro ,  Burgio, Carmelo

IPC分类号： H03M1/10 ,  H03M1/46 ,  H03M1/68 ,  H03M1/80

CPC分类号： H03M1/0809 ,  H03M1/1033 ,  H03M1/1057 ,  H03M1/1245 ,  H03M1/464 ,  H03M1/466 ,  H03M1/687 ,  H03M1/804 ,  H03M1/806

摘要： The present disclosure relates to a method of calibrating a thermometer-code SAR-A/D converter, said thermometer-code SAR-A/D converter comprising a N bit -bit digital-to-analog converter (DAC) for outputting a N bit -bit output code, said digital-to-analog converter (DAC) comprising a first subconverter (C MSB ) having a plurality of N Th thermometer elements T j (1) and a second subconverter (C LSB ) having a plurality of N Bin binary-weighted elements (2), wherein said N bit output code is equal to the sum of N BitTh and N BitBin where N Th = 2^N BitTh and N BitBin is equal to N Bin = N BitBin . The calibration method includes the steps of determining (5) an Integral Non-Linearity error value (µ R ) of a R th thermometer-code level of said thermometer elements T j according to the formula: µ R = ˆ‘ j = 0 R - 1 E j - R N th ˆ‘ j = 0 N th - 1 E j where E j represents the relative differences between said plurality of thermometer elements T j and a reference thermometer element T ref selected from said plurality of thermometer elements T j of said digital-to-analog converter (DAC) - minimizing (6) the maximum of said error value µ R to obtain a minimized error value; - generating (7) said output code (OUTPUT) according to said minimized error.

公开(公告)号：EP3044796A1

公开(公告)日：2016-07-20

申请号：EP14776934.3

申请日：2014-09-09

申请人： Microchip Technology Incorporated

发明人： MEACHAM, Daniel, R. ,  PANIGADA, Andrea ,  SHIH, David

IPC分类号： G11C27/02 ,  H03M1/12 ,  H03M1/06

CPC分类号： H03M1/08 ,  G11C27/02 ,  G11C27/024 ,  H03M1/066 ,  H03M1/1033 ,  H03M1/12 ,  H03M1/1205 ,  H03M1/122 ,  H03M1/1225 ,  H03M1/167 ,  H03M1/36

摘要： An analog input stage has m differential input channels, wherein m>l. The analog input stage is configured to select one of the m differential input channels and provide an output signal. The analog input stage has n identical selection units each having m differential channel inputs and one differential output, wherein n is at least 2111"1. Each selection unit is operable to be coupled to any of the differential input channels through respective differential multiplexer units, wherein the multiplexor units are driven to select one of the differential input channels and couple the selected differential channel input through a butterfly switch unit with the differential output of the selection unit. The differential output signals of the n selection units are combined whereby unwanted crosstalk from channels other than a selected channel are removed by cancellation.

摘要翻译： 模拟输入级具有m个差分输入通道，其中m> 1。 模拟输入级被配置为选择m个差分输入通道之一并提供输出信号。 模拟输入级具有n个相同的选择单元，每个具有m个差分通道输入和一个差分输出，其中n至少为2m-1。 每个选择单元可操作以通过相应的差分多路复用器单元耦合到任何差分输入通道，其中多路复用器单元被驱动以选择差分输入通道中的一个，并通过蝶形开关单元将所选择的差分通道输入与差分 输出选择单元。 组合n个选择单元的差分输出信号，从而通过取消消除了除了所选频道之外的信道的不希望的串扰。

公开(公告)号：EP3021489A1

公开(公告)日：2016-05-18

申请号：EP15194532.6

申请日：2015-11-13

申请人： Analog Devices, Inc.

发明人： Devarajan, Siddharth ,  Singer, Lawrence ,  Shrestha, Prawal Man ,  Huang, Pingli

IPC分类号： H03M1/12 ,  H03M1/06 ,  H03M1/10

CPC分类号： H03M1/121 ,  H03M1/00 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0609 ,  H03M1/0612 ,  H03M1/066 ,  H03M1/0836 ,  H03M1/1033 ,  H03M1/12 ,  H03M1/1215 ,  H03M1/124

摘要： A time-interleaved analog-to-digital converter (ADC) uses M sub-analog-to-digital converters (sub-ADCs) to, according to a sequence, sample an analog input signal to produce digital outputs. When the M sub-ADCs are interleaved, the digital outputs exhibit mismatch errors between the M sub-ADCs due to mismatches between the sub-ADCs. A more second order subtle effect is that the mismatch error for a particular digital output from a particular ADC, due to internal coupling or other such interaction and effects between the M sub-ADCs, can vary depending on which sub-ADC(s) were used before and/or after the particular sub-ADC. If M sub-ADCs are time-interleaved randomly, the mismatches between the M sub-ADCs become a function of the sub-ADC selection pattern in the sequence. The present disclosure describes mechanisms for measuring and reducing these order-dependent mismatches to achieve high dynamic range performance in the time-interleaved ADC.

摘要翻译： 时间交错模拟数字转换器（ADC）使用M个子模拟 - 数字转换器（子ADC），其中，根据一个序列，采样模拟输入信号以产生数字输出。 当M个子ADC被交错，所述M个子ADC之间由于子ADC之间的失配的数字输出呈现的失配误差。 更二阶微妙效果做了失配误差从特定ADC特定数字输出，由于内部耦合或其他搜索相互作用和M个子ADC之间效果可以变化，这取决于子ADC（S）是 之前和/或所述特定子ADC后使用。 如果M个子ADC是时间交织随机地，将所述M个子ADC之间的失配变得序列中的子ADC选择模式的功能。 本公开描述了用于测量和减少合成顺序依赖性的失配，以实现在时间交织ADC的高动态范围的性能的机制。

公开(公告)号：EP2211148A2

公开(公告)日：2010-07-28

申请号：EP09015331.3

申请日：2009-12-10

申请人： KUKA Roboter GmbH

发明人： Steidl, Dietmar

IPC分类号： G01D5/20 ,  H02K24/00 ,  H03M1/64

CPC分类号： H02P13/10 ,  G01D5/2073 ,  H03M1/1033 ,  H03M1/485

摘要： Ein erfindungsgemäßes Verfahren zur Bestimmung der Winkellage (p) eines Resolvers umfasst die Schritte: Erregen einer Erregerwicklung (R) mit einem Referenzsignal (U(t)); Abtasten eines aus dem Referenzsignal resultierenden ersten Signals (U S1 (t)) in einer ersten Wicklung (S1) und eines aus dem Referenzsignal resultierenden zweiten Signals (U S2 (t)) in einer zweiten Wicklung (S2); Bestimmung eines unkompensierten Fourierkoeffizienten (z S1 ) für das erste und eines unkompensierten Fourierkoeffizienten (z S2 ) für das zweite Signal (U S1 (t), U S2 (t)); Bestimmen eines kompensierten Fourierkoeffizienten (z S1, kom ) für das erste und eines kompensierten Fourierkoeffizienten (z S2, kom ) für das zweite Signal (U S1 (t), U S2 (t)); und
Bestimmung der Winkellage (p) des Resolvers aus den kompensierten Fourierkoeffizienten (z S1, kom , z S2, kom ); wobei kompensierte Fourierkoeffizienten (z S1, kom , z S2, kom ) die Änderung der unkompensierten Fourierkoeffizienten (z S1, z S2 ) aufgrund der Änderung der Winkellage während der Abtastung im Wesentlichen kompensieren.

摘要翻译： 该方法涉及在两个定子绕组（S1，S2）中采样由正弦参考信号产生的两个信号。 确定采样信号的未补偿傅里叶系数。 根据系数确定旋转变压器的角位置（rho）。 确定采样信号的补偿傅里叶系数。 从补偿系数确定位置，该补偿系数根据解算器的相移和/或采样期间的位置变化来补偿未补偿系数的变化。 还包括以下独立权利要求：（1）用于自动确定解算器的角位置的装置（2）用于执行用于确定解算器的角位置的方法的计算机程序（3），计算机程序产品包括程序 用于执行用于确定旋转变压器的角位置的方法的计算机程序的代码。

公开(公告)号：EP1655841A3

公开(公告)日：2006-06-14

申请号：EP05256763.3

申请日：2005-11-01

申请人： TEKTRONIX, INC.

发明人： Slavin, Keith R.

IPC分类号： H03M1/10 ,  H03H17/00

CPC分类号： H03M1/1033

摘要： A calibration system for calibrating a linearity corrector using the sum of filter products is proved, along with a method of calibrating the linearity corrector. The calibration system includes a first and second signal generator for introducing test signals into a signal processing system, such as an ADC. An acquisition memory and processor are provided for acquiring and analyzing the output of the signal processing system and then programming the filter coefficients into the linearity corrector. The method of calibration analyzes acquired intermodulation and harmonic components from the signal processing sytem and then finds the amplitude and phase response for the filters. The amplitude and phase response is then used to determine a set of filter coefficients.

摘要翻译： 证明了使用滤波器产品之和来校准线性校正器的校准系统，以及校准线性校正器的方法。 校准系统包括用于将测试信号引入信号处理系统（例如ADC）的第一和第二信号发生器。 提供采集存储器和处理器用于采集和分析信号处理系统的输出，然后将滤波器系数编程到线性校正器中。 校准方法从信号处理系统中获取互调和谐波分量，然后找出滤波器的幅度和相位响应。 幅度和相位响应然后用于确定一组滤波器系数。

公开(公告)号：EP0889596A2

公开(公告)日：1999-01-07

申请号：EP98110847.5

申请日：1998-06-12

申请人： Harris Corporation

发明人： Shu, Tzi-Hsiung ,  von Dolteren, George Eugene

IPC分类号： H03M1/10

CPC分类号： H03M1/1033 ,  H03M1/12 ,  H03M1/66

摘要： The calibration method comprises the steps of: driving the analog-to-digital converter (ADC) with at least one test signal; calibrating the driven ADC over a series of successive ADC calibrations; generating a series of successive ADC figure of merit measurements for respective successive ADC calibrations, the series of successive ADC figure of merit measurements defining at least a portion of a curve having a local minimum/maximum; and stopping calibrating at an ADC calibration corresponding to the local minimum/maximum of the curve defined by the series of successive ADC figure of merit measurements. The step of calibrating comprises incrementally calibrating the ADC over the series of successive ADC calibrations. The method comprises the step of determining the local minimum/maximum of the curve. The step of determining comprises fitting an equation to the series of ADC figure of merit measurements; and calculating the local minimum/maximum based upon the equation. The step of fitting the equation comprises fitting the equation based upon a predetermined number of prior ADC figure of merit measurements. The step of fitting the equation may comprise fitting a polynomial equation, such as a third order equation, to the series of ADC figure of merit measurements.

摘要翻译： 该校准方法包括以下步骤：用至少一个测试信号驱动模拟 - 数字转换器（ADC）; 通过一系列连续的ADC校准校准驱动ADC; 产生一系列连续的ADC品质因数测量值，用于相应的连续ADC校准，连续的ADC品质因数测量系列定义了具有局部最小/最大值的曲线的至少一部分; 并停止校准，该校准对应于由连续的ADC品质因数测量值定义的曲线的局部最小值/最大值。 校准步骤包括在连续的ADC校准系列中逐步校准ADC。 该方法包括确定曲线的局部最小/最大值的步骤。 确定步骤包括将方程拟合到一系列ADC品质因数测量; 并根据等式计算局部最小/最大值。 拟合方程的步骤包括基于预先确定数量的先验ADC品质因数测量值拟合方程式。 拟合方程的步骤可以包括将多项式方程（例如三阶方程）拟合到一系列ADC品质因数测量值。

公开(公告)号：EP3026818A1

公开(公告)日：2016-06-01

申请号：EP15189321.1

申请日：2015-10-12

申请人： STMicroelectronics S.r.l.

发明人： BURGIO, Carmelo ,  GIACOMINI, Mauro

IPC分类号： H03M1/10 ,  H03M1/46

CPC分类号： H03M1/1047 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/1033 ,  H03M1/12 ,  H03M1/1245 ,  H03M1/462 ,  H03M1/466 ,  H03M1/687 ,  H03M1/802 ,  H03M1/804 ,  H03M1/806 ,  H03M1/808

摘要： The present disclosure relates to a method of self-calibration of a SAR-A/D converter, comprising a N bit -bit digital-to-analog converter (DAC) for outputting a N bit -bit output code, said digital-to-analog converter (DAC) comprising a first subconverter (C MSB ) having a plurality N Th of thermometer elements T j (1) and a second subconverter (C LSB ) having a plurality of binary-weighted elements N Bin , said output code being defined by a thermometer scale S Th having a number of levels equal to 2 NBitTh +1. The method is characterized in that it comprises the steps of:
- measuring, for each thermometer element of said plurality N Th of thermometer elements T j , an error value;
- determining a mean value (µ) of these values;
- dividing said plurality N Th of thermometer elements T j into a first subset (X) and a second subset (Y) each containing an identical number of values (x, y), equal to N Th /2, wherein said first subset (X) comprises the thermometer elements T j whose values are closer to said mean value (µ) as long as the error of the sum of thermometer elements T j of the first subset (X) is not worse than the error value of the element farthest from said mean value (µ) of said first subset (X) and said second subset (Y) comprising all the remaining thermometer elements T j ;
- generating said thermometer scale, on the assumption that:
- each level m i of said thermometer scale S Th , with i ranging from 0 to N Th /2, will be the incremental sum of each value (x) of said first ordered subset X;
- each further level m i of said thermometer scale S Th , with i ranging from N Th /2+1 to N Th , will be the sum of all the values (y) of said second subset Y plus the incremental sum of the elements (x) of the subset X in any order;
- generating said output code (OUTPUT) according to said thermometer scale S Th .

摘要翻译： 本发明涉及一种SAR A / D转换器的自校准的方法，包括一个n位的位的数字 - 模拟转换器（DAC），用于输出一个廷n比特位输出代码，所述数字到 模拟转换器（DAC），包括第一子转换器具有具有二进制加权元件的多元性温度计元件T J（1）的N个Th和第二子转换器（C LSB）（C MSB）N滨所述输出代码被定义 通过温度计比例S的Th具有多个相等的水平，以2 NBitTh 1。 该方法的特征在于，这样做是包括以下步骤： - 测量，为温度计元件T J，误差值的温度计，所述多个第N中的每个元件; - 确定性采矿平均值合成值（μ）; - 将温度计元件T j的所述多个n个成第一个子集（X）和第二子集（Y）各以等于第N / 2个值的数目相同（X，Y）含有worin所述第一子组（ X）包括温度计元件T J，其值更接近所述平均值（μ），只要所述第一子集（X）的温度计元件T j的总和的误差不大于所述元件最远的误差值差 从所述平均值所述第一子组（X）和（μ）所述第二子组（Y），其包括所有剩余的温度计元件T J; - 产生所述温度计的规模，这样的假设： - 每个级别。所述温度计比例S的Th的MI，i的范围从0到N的Th / 2，将说第一有序子集X的每个值（X）的所述增量总和 ; - 说温度计比例S的Th的每此外水平MI，i的范围从第N / 2 + 1至第N，将所述第二子组Y加上元素的增量之和的所有值（Y）的总和（ x）的任何顺序的子集x的; - 所述产生雅丁到所述温度计比例S个输出码（OUTPUT）。

公开(公告)号：EP2961072A1

公开(公告)日：2015-12-30

申请号：EP15173610.5

申请日：2015-06-24

申请人： Huawei Technologies Co., Ltd.

发明人： QIU, Bingsen

IPC分类号： H03M1/10 ,  H03M1/12

CPC分类号： H03M1/0631 ,  H03M1/0624 ,  H03M1/0626 ,  H03M1/0836 ,  H03M1/1033 ,  H03M1/1061 ,  H03M1/1215

摘要： The present invention provides a multi-channel time-interleaved analog-to-digital converter, where the multi-channel time-interleaved analog-to-digital converter includes: a clock generation circuit, configured to generate a work clock of the analog-to-digital converter; a channel ADC group, including M ADC channels, arranged to be in a time-interleaved architecture, and configured to convert, under the control of the clock generation circuit and in a time division multiplexing manner, one high-speed analog input signal into M low-speed digital output signals, where M is an integer not less than 2; a channel mismatch detection circuit, configured to detect in real time timing skew errors of output signals of the M ADC channels, to obtain a timing skew parameter of each ADC channel relative to a reference ADC channel; a signal compensation and reconstruction circuit, configured to perform, according to the timing skew parameters detected by the channel mismatch detection circuit, compensation and reconstruction on the digital output signals output by the channel ADC group; and a signal combining circuit, configured to combine the M low-speed output signals that are of the channels and generated after the compensation by the signal compensation and reconstruction circuit, to obtain one final high-speed digital output signal.

摘要翻译： 本发明提供一种多通道时间交织模数转换器，其中多通道时间交织的模数转换器包括：时钟产生电路，被配置为产生模拟到数字转换器的工作时钟 数字转换器 包括M个ADC通道的通道ADC组，被布置为处于时间交织架构中，并且被配置为在时钟发生电路的控制下并且以时分复用方式将一个高速模拟输入信号转换成M 低速数字输出信号，其中M为不小于2的整数; 通道失配检测电路，被配置为实时检测M个ADC通道的输出信号的定时偏差误差，以获得每个ADC通道相对于参考ADC通道的定时偏移参数; 信号补偿和重构电路，被配置为根据由信道失配检测电路检测的定时偏差参数，对由信道ADC组输出的数字输出信号进行补偿和重建; 以及信号组合电路，被配置为组合由信号补偿和重构电路在补偿之后产生的信道的M个低速输出信号，以获得一个最终的高速数字输出信号。