-
公开(公告)号：US10743411B1
公开(公告)日：2020-08-11
申请号：US16737288
申请日：2020-01-08
Inventor： Ho-Chieh Yu , Chen-Cheng-Lung Liao , Chun-Yu Lin , Hsiao-Ming Chang , Jing-Yao Chang , Tao-Chih Chang
Abstract: A ceramic substrate component suitable for high-power chips includes a ceramic substrate body and at least one raised metal pad. The ceramic substrate body has an upper surface and a lower surface opposite to the upper surface. The raised metal pad includes a base portion and a top layer. The base portion, which is attached to the upper surface of the ceramic substrate body, has a thickness between 10 and 300 micrometers, and a thermal expansion coefficient greater than the ceramic substrate body. The top layer is formed on the base portion and adapted to install a high-power chip thereon. The top layer extends an area less than the base portion but greater than the high-power chip, and has a thermal expansion coefficient greater than the ceramic substrate body. As such, damages due to thermal stress occurring between the base portion and the ceramic substrate body can be mitigated.
-
2.发明申请公开(公告)号：US20200245456A1
公开(公告)日：2020-07-30
申请号：US16737288
申请日：2020-01-08
Inventor： Ho-Chieh Yu , Chen-Cheng-Lung Liao , Chun-Yu Lin , Hsiao-Ming Chang , Jing-Yao Chang , Tao-Chih Chang
Abstract: A ceramic substrate component suitable for high-power chips includes a ceramic substrate body and at least one raised metal pad. The ceramic substrate body has an upper surface and a lower surface opposite to the upper surface. The raised metal pad includes a base portion and a top layer. The base portion, which is attached to the upper surface of the ceramic substrate body, has a thickness between 10 and 300 micrometers, and a thermal expansion coefficient greater than the ceramic substrate body. The top layer is formed on the base portion and adapted to install a high-power chip thereon. The top layer extends an area less than the base portion but greater than the high-power chip, and has a thermal expansion coefficient greater than the ceramic substrate body. As such, damages due to thermal stress occurring between the base portion and the ceramic substrate body can be mitigated.
-
公开(公告)号：US20200186067A1
公开(公告)日：2020-06-11
申请号：US16692279
申请日：2019-11-22
Applicant: ICP Technology Co., Ltd. , Sentec E&E Co., Ltd.
Inventor： Ho-Chieh Yu , Chen-Cheng-Lung Liao , Chun-Yu Lin , Jason An Cheng Huang
Abstract: A motor control device with built-in shunt resistor and power transistor is disclosed, comprising a high-thermally conductive substrate; an electrically conductive circuit which is thermo-conductively installed on the high-thermally conductive substrate and includes a first thermal connection pad portion and a second thermal connection pad portion mutually spaced apart; a high power transistor conductively connected to the electrical conducive circuit; and a shunt resistor conductively connected to the high power transistor, respectively including a body whose thermal expansion coefficient is greater than that of the high-thermally conductive substrate, as well as a pair of welding portions extending from the body, in which the body has a prescribed width, and the width of the welding portion is greater than the prescribed width, and the body and the high-thermally conductive substrate are spaced apart such that, upon welding the welding portion to the first thermal connection pad portion and the second thermal connection pad portion, the thermal expansion stress occurring between the body and the high-thermally conductive substrate can be distributed and undertaken in the width direction.
-
4.发明申请公开(公告)号：US20180352646A1
公开(公告)日：2018-12-06
申请号：US15995756
申请日：2018-06-01
Applicant: ICP Technology Co., Ltd. , Xiamen Sentecee E&E Co., Ltd.
Inventor： Ho-Chieh Yu , Cheng-Lung Liao , Chun-Yu Lin , Jason An-Cheng Huang
Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
-
Patent Agency Ranking
5.发明公开公开(公告)号：US20240114614A1
公开(公告)日：2024-04-04
申请号：US17956544
申请日：2022-09-29
Applicant: ICP Technology Co., LTD. , SENTEC E&E CO., LTD.
Inventor： HO-CHIEH YU , CHEN-CHENG-LUNG LIAO , CHUN-YU LIN , JASON AN CHENG HUANG , CHIH-CHUAN LIANG , KUN-TZU CHEN , NAI-HIS HU , LIANG-YO CHEN
CPC classification number: H05K1/021 , H05K1/0206 , H05K1/0306 , H05K3/0061 , H05K2201/10166
Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
-
公开(公告)号：US11043911B2
公开(公告)日：2021-06-22
申请号：US16692279
申请日：2019-11-22
Applicant: ICP Technology Co., Ltd. , Sentec E&E Co., Ltd.
Inventor： Ho-Chieh Yu , Chen-Cheng-Lung Liao , Chun-Yu Lin , Jason An Cheng Huang
Abstract: A motor control device with built-in shunt resistor and power transistor is disclosed, comprising a high-thermally conductive substrate; an electrically conductive circuit which is thermo-conductively installed on the high-thermally conductive substrate and includes a first thermal connection pad portion and a second thermal connection pad portion mutually spaced apart; a high power transistor conductively connected to the electrical conducive circuit; and a shunt resistor conductively connected to the high power transistor, respectively including a body whose thermal expansion coefficient is greater than that of the high-thermally conductive substrate, as well as a pair of welding portions extending from the body, in which the body has a prescribed width, and the width of the welding portion is greater than the prescribed width, and the body and the high-thermally conductive substrate are spaced apart such that, upon welding the welding portion to the first thermal connection pad portion and the second thermal connection pad portion, the thermal expansion stress occurring between the body and the high-thermally conductive substrate can be distributed and undertaken in the width direction.
-
公开(公告)号：US20250132233A1
公开(公告)日：2025-04-24
申请号：US18381598
申请日：2023-10-18
Applicant: ICP TECHNOLOGY CO., LTD. , SENTEC E&E CO., LTD.
Inventor： HO-CHIEH YU , CHEN-CHENG-LUNG LIAO , CHUN-YU LIN , JASON AN CHENG HUANG , Liang-Yo CHEN
IPC: H01L23/495 , H01L23/00 , H01L25/065
Abstract: Disclosed are a heat-electricity discrete power module with two-way heat-dissipation ceramic substrates and a manufacturing method of the same, including: two double-sided metal-clad ceramic substrates, a power transistor die, and an insulation sealant; each double-sided metal-clad ceramic substrate including a ceramic insulation layer, a three-dimensional conductive layer formed on the first ceramic insulation layer and facing the opposite three-dimensional conductive layer to constitute an electrical circuit, and a thermally-conductive metallic layer opposite and insulated from the three-dimensional conductive layer, respectively; electrodes of each power transistor die are electrically conductively connected to the three-dimensional conductive layer, and their upper and lower surfaces are thermally conductively connected to respective three-dimensional conductive layers; circuit components are additionally mounted on the three-dimensional conductive layers; at least one conductive post is formed between the circuits of respective three-dimensional conductive layers; the power transistor die and conductive post are completely encapsulated by the insulation sealant.
-
公开(公告)号：US20230378145A1
公开(公告)日：2023-11-23
申请号：US18197607
申请日：2023-05-15
Inventor： HO-CHIEH YU , CHEN-CHENG-LUNG LIAO , CHUN-YU LIN , JASON AN CHENG HUANG , CHIH-CHUAN LIANG , KUN-TZU CHEN , NAI-HIS HU
IPC: H01L25/16 , H01L23/498 , H01L23/00
CPC classification number: H01L25/16 , H01L23/49838 , H01L24/05 , H01L24/06 , H01L2224/05552 , H01L2224/05553 , H01L2224/06051 , H01L2224/06155
Abstract: Disclosed is a flip-chip packaged power transistor module having a built-in gate driver, for outputting a high-power signal of at least tens of amperes, the module including at least one power transistor die which has an active side where at least one source pin, at least one drain pin and at least one gate pin are exposed; a ceramic substrate body which has a conducting junction side and a heat spreading side, a minimal spacing of the gate bonding pad from at least one of the source bonding pad or the drain bonding pad being less than 500 μm, whereby parasitic inductance generated therebetween is reduced; at least one gate driver which has at least one gate pin configured to be soldered to the gate bonding pad, and at least one gate drive pin which corresponds to the gate pin and is configured to be soldered to the drive bonding pad.
-
公开(公告)号：US10524349B2
公开(公告)日：2019-12-31
申请号：US15995756
申请日：2018-06-01
Applicant: ICP Technology Co., Ltd. , Xiamen Sentecee E&E Co., Ltd.
Inventor： Ho-Chieh Yu , Cheng-Lung Liao , Chun-Yu Lin , Jason An-Cheng Huang
IPC: H05K1/02 , H05K1/03 , H01L23/373 , H05K1/18 , H01L23/367 , F21V29/76 , H01L33/64 , F21S8/08 , F21Y115/10 , F21V29/503
Abstract: A printed circuit board with built-in vertical heat dissipation ceramic block, and an electrical assembly are disclosed. The electrical assembly includes the board and a plurality of electronic components. The printed circuit boards includes a dielectric material layer defining at least one through hole, at least one ceramic block corresponding to the through hole, at least one fixing portion for joining the ceramic block to the through hole of the dielectric material layer, a metal circuit layer provided on upper surfaces of the dielectric material layer and the ceramic block, and a high thermal conductivity layer provided on lower surfaces of the dielectric material layer and the ceramic block. The printed circuit board allows the location and size of the ceramic block to be modified according to requirements, so as to implement complicated circuit designs, achieve good effect of thermal conduction, control thermal conduction path, and reduce manufacturing cost.
-
-
-
-
-
-
-
-
Search Results
9
records
(took 0.01 seconds)
