公开(公告)号：US20130271271A1

公开(公告)日：2013-10-17

申请号：US13894444

申请日：2013-05-15

Applicant: Ta-Yung Yang ,  Jenn-Yu G. Lin ,  Yi-Chi Lin ,  Cheng-Chi Hsueh

Inventor： Ta-Yung Yang ,  Jenn-Yu G. Lin ,  Yi-Chi Lin ,  Cheng-Chi Hsueh

IPC: G08C19/16

CPC classification number: G08C19/16 ,  H02M5/2573 ,  Y10T307/832

Abstract: A wall control interface for power management includes a transmitting circuit that generates a switching signal to control a switch and achieve a phase modulation to a power line signal in response to a transmitting-data. A receiving circuit is coupled to detect the phase of the power line signal for generating a data signal and a receiving-data in response to the phase of the power line signal. The receiving circuit further generates a control signal to control power of a load in accordance with the data signal or the receiving-data. The phase modulation is achieved by controlling a turn-on angle of the power line signal. The switch remains in a turn-on state during the normal condition, which achieves good power and low current harmonic. The phase modulation is only performed during the communication of the power management.

Abstract translation: 用于电力管理的墙壁控制接口包括产生开关信号以控制开关并且响应于发送数据实现对电力线信号的相位调制的发送电路。 接收电路被耦合以检测用于响应于电力线信号的相位的数据信号和接收数据的电力线信号的相位。 接收电路还根据数据信号或接收数据产生控制负载的功率的控制信号。 通过控制电力线信号的接通角来实现相位调制。 在正常情况下，开关保持导通状态，实现良好的功率和低电流谐波。 相位调制仅在电源管理通讯期间进行。

公开(公告)号：US08154153B2

公开(公告)日：2012-04-10

申请号：US11627052

申请日：2007-01-25

Applicant: Ta-yung Yang ,  Jenn-Yu G. Lin

Inventor： Ta-yung Yang ,  Jenn-Yu G. Lin

IPC: H02J7/00

CPC classification number: H04B3/54 ,  H04B2203/547 ,  H04B2203/5491 ,  Y10T307/625

Abstract: A power supply system is introduced herein. The power supply system includes a power converter to supply a power source to an electronic circuit through an output cable of the power supply. A communication unit is coupled to the output cable of the power supply to develop a communication channel between the power converter and the electronic circuit in order to report the status of the power converter to the electronic circuit.

Abstract translation: 本文介绍电源系统。 电源系统包括电源转换器，用于通过电源的输出电缆向电子电路提供电源。 通信单元耦合到电源的输出电缆，以在功率转换器和电子电路之间开发通信信道，以便将功率转换器的状态报告给电子电路。

公开(公告)号：US07903435B2

公开(公告)日：2011-03-08

申请号：US12276415

申请日：2008-11-24

Applicant: Wei-Hsuan Huang ,  Jenn-Yu G. Lin ,  Ta-Yung Yang

Inventor： Wei-Hsuan Huang ,  Jenn-Yu G. Lin ,  Ta-Yung Yang

IPC: H02M3/335 ,  G05F1/40

CPC classification number: H02M3/33507 ,  H02M1/44

Abstract: A switching controller having switching frequency hopping for a power converter includes a first oscillator generating a pulse signal and a maximum duty-cycle signal for determining a switching frequency of a switching signal, a pattern generator having a second oscillator and generating a digital pattern code in response to a clock signal, a programmable capacitor coupled to the pattern generator and the first oscillator for modulating the switching frequency of the switching signal in response to the digital pattern code, and a PWM circuit coupled to the first oscillator for generating the switching signal in accordance with the maximum duty-cycle signal. A maximum on-time of the switching signal is limited by the maximum duty-cycle signal. The switching signal is utilized to switch a transformer of the power converter.

Abstract translation: 具有用于功率转换器的开关跳频的开关控制器包括产生脉冲信号的第一振荡器和用于确定开关信号的开关频率的最大占空比信号，具有第二振荡器并产生数字模式代码的模式发生器 响应于时钟信号，耦合到模式发生器的可编程电容器和用于响应于数字模式代码调制开关信号的开关频率的第一振荡器，以及耦合到第一振荡器的PWM电路，用于产生开关信号 根据最大占空比信号。 开关信号的最大导通时间受到最大占空比信号的限制。 切换信号用于切换功率转换器的变压器。

公开(公告)号：US07615826B2

公开(公告)日：2009-11-10

申请号：US11427773

申请日：2006-06-29

Applicant: Chih-Feng Huang ,  Tuo-Hsin Chien ,  Jenn-Yu G. Lin ,  Ta-yung Yang

Inventor： Chih-Feng Huang ,  Tuo-Hsin Chien ,  Jenn-Yu G. Lin ,  Ta-yung Yang

IPC: H01L23/62

CPC classification number: H01L27/0259

Abstract: An electrostatic discharge (ESD) protection device with adjustable single-trigger or multi-trigger voltage is provided. The semiconductor structure has multi-stage protection semiconductor circuit function and adjustable discharge capacity. The single-trigger or multi-trigger semiconductor structure may be fabricated by using the conventional semiconductor process, and can be applied to IC semiconductor design and to effectively protect the important semiconductor devices and to prevent the semiconductor devices from ESD damage. In particular, the present invention can meet the requirements of high power semiconductor device and has better protection function compared to conventional ESD protection circuit. In the present invention, a plurality of N-wells or P-wells connected in parallel are used to adjust the discharge capacity of various wells in the P-substrate so as to improve the ESD protection capability and meet different power standards.

Abstract translation: 提供具有可调单触发或多触发电压的静电放电（ESD）保护装置。 半导体结构具有多级保护半导体电路功能和可调放电容量。 单触发或多触发半导体结构可以通过使用传统的半导体工艺制造，并且可以应用于IC半导体设计并且有效地保护重要的半导体器件并且防止半导体器件受到ESD损坏。 特别地，本发明可以满足大功率半导体器件的要求，与传统的ESD保护电路相比具有更好的保护功能。 在本发明中，使用并联连接的多个N阱或P阱来调整P基板中的各个阱的放电容量，以提高ESD保护能力并满足不同的功率标准。

公开(公告)号：USRE40656E1

公开(公告)日：2009-03-10

申请号：US11411208

申请日：2006-04-24

Applicant: Ta-yung Yang ,  Jenn-Yu G. Lin ,  Chern-Lin Chen

Inventor： Ta-yung Yang ,  Jenn-Yu G. Lin ,  Chern-Lin Chen

IPC: H02M3/335

CPC classification number: H02M3/33507 ,  H02M1/32 ,  H02M2001/0006 ,  H02M2001/0032 ,  H02M2001/0041 ,  Y02B70/16

Abstract: The present invention provides a primary-side flyback power converter that supplies a constant voltage output and a constant current output. To generate a well-regulated output voltage under varying load conditions, a PWM controller is included in the power converter in order to generate a PWM signal controlling a switching transistor in response to a flyback voltage sampled from a first primary winding of the power supply transformer. Several improvements are included in this present invention to overcome the disadvantages of prior-art flyback power converters. Firstly, the flyback energy of the first primary winding is used as a DC power source for the PWM controller in order to reduce power consumption. A double sample amplifier samples the flyback voltage just before the transformer current drops to zero. Moreover, an offset current is pulled from a detection input of the double sample amplifier in order to generate a more accurate DC output voltage. The offset current is generated in response to the temperature in order to compensate for temperature-induced voltage fluctuations across the output rectifier. Ultimately, in order to maintain a constant output current, the PWM controller modulates the switching frequency in response to the output voltage.

Abstract translation: 本发明提供了提供恒定电压输出和恒定电流输出的初级侧反激式功率转换器。 为了在变化的负载条件下产生良好调节的输出电压，PWM控制器被包括在功率转换器中，以便响应于从电源变压器的第一初级绕组采样的回扫电压产生控制开关晶体管的PWM信号 。 在本发明中包括若干改进以克服现有技术的反激式功率转换器的缺点。 首先，为了降低功耗，首先将初级绕组的回扫能量用作PWM控制器的直流电源。 双倍采样放大器在变压器电流下降到零之前对反激电压进行采样。 此外，从双倍放大器的检测输入端拉出偏移电流，以产生更精确的直流输出电压。 偏移电流响应于温度而产生，以便补偿输出整流器两端的温度感应电压波动。 最终，为了保持恒定的输出电流，PWM控制器响应于输出电压来调制开关频率。

公开(公告)号：US07205201B2

公开(公告)日：2007-04-17

申请号：US10914943

申请日：2004-08-09

Applicant: Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu G. Lin ,  Tuo-Hsin Chien

Inventor： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu G. Lin ,  Tuo-Hsin Chien

IPC: H01L21/8234

CPC classification number: H01L21/823814 ,  H01L21/823857 ,  H01L21/823892

Abstract: A method of manufacturing different-voltage devices mainly comprises forming at least one high-voltage well in high-voltage device regions, at least one N-well in low-voltage device regions, at least one P-well in low-voltage device regions, source/drain wells in high-voltage device regions, and isolation wells in isolation regions in a p-type substrate. The breakdown voltage is adjusted by modulating the ion doping profile. Furthermore, parameters of implanting conductive ions are adjusted for implanting conductive ions into both high-voltage device regions and low-voltage device regions. The isolation wells formed in isolation regions between devices are for separating device formed over high-voltage device regions and device formed over low-voltage device regions. The thickness of a HV gate oxide layer is thicker than the thickness of an LV gate oxide layer for modulating threshold voltages of high-voltage devices and low-voltage devices.

Abstract translation: 一种制造不同电压装置的方法主要包括在高电压装置区域中形成至少一个高电压阱，在低电压装置区域中形成至少一个N阱，在低电压装置区域中形成至少一个P阱 ，高压器件区域中的源/漏极阱以及p型衬底中的隔离区中的隔离阱。 通过调制离子掺杂分布来调整击穿电压。 此外，调整注入导电离子的参数，以将导电离子注入到高电压器件区域和低电压器件区域中。 在器件之间的隔离区域中形成的隔离阱用于在高电压器件区域上形成的分离器件和在低电压器件区域上形成的器件。 HV栅极氧化物层的厚度比用于调制高电压器件和低电压器件的阈值电压的LV栅极氧化物层的厚度厚。

公开(公告)号：US07091710B2

公开(公告)日：2006-08-15

申请号：US10838925

申请日：2004-05-03

Applicant: Ta-yung Yang ,  Jenn-yu G. Lin ,  Chien-Liang Chen

Inventor： Ta-yung Yang ,  Jenn-yu G. Lin ,  Chien-Liang Chen

IPC: G05F1/40

CPC classification number: G05F1/575

Abstract: A method and apparatus to dynamically modify internal compensation of a low dropout (LDO) voltage regulator is provided. The LDO voltage regulator includes an output pass transistor, an error amplifier, a bias transistor and a compensation network. The compensation network is connected between a gate and a drain of the output pass transistor to compensate for the feedback loop. The compensation network and the bias transistor generate pole-zero pairs to perform a maximum 45 degrees phase shift before reaching the crossover frequency in the LDO voltage regulator. Therefore a minimum 45 degrees phase margin is provided for the feedback loop in various load conditions. Furthermore, the pole-zero pairs produced in the LDO voltage regulator are adaptively adjusted according to load conditions, so that the bandwidth is optimized and faster transient response is achieved.

Abstract translation: 提供了一种用于动态修改低压差（LDO）电压调节器的内部补偿的方法和装置。 LDO稳压器包括输出传输晶体管，误差放大器，偏置晶体管和补偿网络。 补偿网络连接在输出传输晶体管的栅极和漏极之间，以补偿反馈环路。 补偿网络和偏置晶体管产生极点对，以在LDO稳压器达到交越频率之前执行最大45度相移。 因此，在各种负载条件下，为反馈回路提供最小45度的相位裕度。 此外，LDO稳压器中产生的极点对根据负载条件进行自适应调整，从而优化带宽，实现更快的瞬态响应。

公开(公告)号：US06995428B2

公开(公告)日：2006-02-07

申请号：US10786703

申请日：2004-02-24

Applicant: Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu G. Lin ,  Tuo-Hsin Chien

Inventor： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu G. Lin ,  Tuo-Hsin Chien

IPC: H01L29/76

CPC classification number: H01L29/0634 ,  H01L29/0878 ,  H01L29/0886 ,  H01L29/42368 ,  H01L29/7816

Abstract: A high voltage LDMOS transistor according to the present invention includes a P-field and divided P-fields in an extended drain region of a N-well. The P-field and divided P-fields form junction-fields in the N-well, in which a drift region is fully depleted before breakdown occurs. Therefore, a higher breakdown voltage is achieved and a higher doping density of the N-well is allowed. Higher doping density can effectively reduce the on-resistance of the LDMOS transistor. Furthermore, the N-well generated beneath a source diffusion region provides a low-impedance path for a source region, which restrict the transistor current flow in between a drain region and a source region.

Abstract translation: 根据本发明的高电压LDMOS晶体管包括在N阱的扩展漏极区域中的P场和分割的P场。 P场和分割的P场在N阱中形成结场，其中漂移区在击穿之前被完全耗尽。 因此，实现更高的击穿电压，并且允许N阱的较高的掺杂密度。 较高的掺杂密度可以有效降低LDMOS晶体管的导通电阻。 此外，在源极扩散区域之下产生的N阱为源极区域提供了低阻抗路径，其限制了漏极区域和源极区域之间的晶体管电流。

公开(公告)号：US06873011B1

公开(公告)日：2005-03-29

申请号：US10786701

申请日：2004-02-24

Applicant: Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu G. Lin ,  Tuo-Hsin Chien

Inventor： Chih-Feng Huang ,  Ta-yung Yang ,  Jenn-yu G. Lin ,  Tuo-Hsin Chien

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/94

CPC classification number: H01L29/7816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0696

Abstract: A high voltage LDMOS transistor according to the present invention includes P-field blocks in the extended drain region of a N-well. The P-field blocks form the junction-fields in the N-well for equalizing the capacitance of parasitic capacitors between the drain region and the source region and fully deplete the drift region before breakdown occurs. A higher breakdown voltage is therefore achieved and the N-well having a higher doping density is thus allowed. The higher doping density reduces the on-resistance of the transistor. Furthermore, the portion of the N-well generated beneath the source diffusion region produces a low-impedance path for the source region, which restricts the transistor current flow in between the drain region and the source region.

Abstract translation: 根据本发明的高电压LDMOS晶体管包括N阱扩展漏极区中的P场区块。 P-场块形成N阱中的结场，用于均衡漏极区域和源极区域之间的寄生电容器的电容，并且在击穿之前完全耗尽漂移区域。 因此实现更高的击穿电压，因此允许具有较高掺杂密度的N阱。 较高的掺杂密度降低了晶体管的导通电阻。 此外，在源极扩散区域之下产生的N阱的部分产生用于源极区域的低阻抗路径，其限制了漏极区域和源极区域之间的晶体管电流。

公开(公告)号：US06862194B2

公开(公告)日：2005-03-01

申请号：US10465467

申请日：2003-06-18

Applicant: Ta-yung Yang ,  Chern-Lin Chen ,  Jenn-yu G. Lin ,  Song-Yi Lin

Inventor： Ta-yung Yang ,  Chern-Lin Chen ,  Jenn-yu G. Lin ,  Song-Yi Lin

IPC: H02M3/335 ,  H02M7/04

CPC classification number: H02M3/33507 ,  H02M2001/0006

Abstract: A primary-side flyback power converter supplies a constant voltage and a constant current output. To generate a well-regulated output voltage under varying load conditions, the power converter includes a PWM controller. The PWM controller generates a PWM signal to control a switching transistor in response to a flyback voltage detected from the first primary winding of the power supply transformer. To reduce power consumption, the flyback energy of the first primary winding is used as a DC power source for the PWM controller. The flyback voltage is sampled following a delay time to reduce interference from the inductance leakage of the transformer. To generate a more accurate DC output voltage, a bias current is pulled from the detection input to form a voltage drop across a detection resistor for compensating for the voltage drop of the output rectifying diode.

Abstract translation: 初级侧反激式功率转换器提供恒定电压和恒定电流输出。 为了在变化的负载条件下产生良好调节的输出电压，功率转换器包括PWM控制器。 PWM控制器产生PWM信号以响应于从电源变压器的第一初级绕组检测到的回扫电压来控制开关晶体管。 为了降低功耗，第一个初级绕组的回扫能量被用作PWM控制器的直流电源。 在延迟时间之后对回扫电压进行采样，以减少变压器的电感泄漏引起的干扰。 为了产生更精确的直流输出电压，从检测输入端拉出偏置电流，在检测电阻上形成电压降，以补偿输出整流二极管的电压降。