公开(公告)号：US5638370A

公开(公告)日：1997-06-10

申请号：US365356

申请日：1994-12-28

Applicant: Mark Seconi ,  Paul McAllister ,  Glenn Lewis

Inventor： Mark Seconi ,  Paul McAllister ,  Glenn Lewis

IPC: H04L1/00 ,  H04L29/06 ,  H04L29/08 ,  H04T3/06

CPC classification number: H04L1/0057 ,  H04L29/06 ,  H04L69/324

Abstract: A status bit controlled HDLC accelerator comprises a fully programmable CRC generation circuit, a partial data packet formatting/unformatting capability and a dual-mode register set. The HDLC accelerator includes a set of registers that can be written to and read from directly via a bus interface circuit. Moreover, these registers may be written to and read from at any time so that the state of the HDLC accelerator during a formatting or unformatting operation may be stored in mid-operation. The HDLC accelerator further includes a CRC generation circuit that can perform various checkword generation functions in response to a programmable CRC generator polynomial. In addition, programmable counters within the HDLC accelerator allow partial data packets to be processed which thereby enables formatting and unformatting data packets of all valid bit enumerations.

Abstract translation: 状态位控制的HDLC加速器包括完全可编程的CRC生成电路，部分数据分组格式化/非格式化能力以及双模式寄存器组。 HDLC加速器包括一组可以通过总线接口电路直接写入和读取的寄存器。 此外，这些寄存器可以在任何时刻被写入和读取，使得格式化或非格式化操作期间的HDLC加速器的状态可以被存储在中间操作中。 HDLC加速器还包括CRC生成电路，其可以响应于可编程CRC生成多项式来执行各种复制词生成功能。 此外，HDLC加速器内的可编程计数器允许处理部分数据包，从而可以格式化和取消格式化所有有效位枚举的数据包。

公开(公告)号：US20080071851A1

公开(公告)日：2008-03-20

申请号：US11524852

申请日：2006-09-20

Applicant: Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

Inventor： Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

IPC: G06F7/52

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

Abstract translation: 用于进行点积运算的方法，装置和程序装置。 在一个实施例中，一种装置包括执行第一指令的执行资源。 响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。

公开(公告)号：US20140032624A1

公开(公告)日：2014-01-30

申请号：US14042681

申请日：2013-09-30

Applicant: Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

Inventor： Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

IPC: G06F17/10

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

Abstract translation: 用于执行点积运算的方法，装置和程序装置。 在一个实施例中，一种装置包括执行第一指令的执行资源。 响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。

公开(公告)号：US5619726A

公开(公告)日：1997-04-08

申请号：US320927

申请日：1994-10-11

Applicant: Mark Seconi ,  Paul Mc Allister ,  Andrew Hall ,  Marc Jalfon

Inventor： Mark Seconi ,  Paul Mc Allister ,  Andrew Hall ,  Marc Jalfon

IPC: G06F13/28 ,  G06F13/364 ,  G06F13/40 ,  G06F13/36

CPC classification number: G06F13/364 ,  G06F13/28 ,  G06F13/4031

Abstract: An apparatus and method for arbitrating bus ownership of a first communication bus ("C1-bus") for a plurality of C1-bus masters and arbitrating bus ownership of a second communication bus ("C2-bus") for a plurality of C2-bus masters. The apparatus further performs a DMA transfer, without processor assistance, between a first component coupled to the C1-bus and a second component coupled to the C2-bus.

Abstract translation: 一种用于多个C1总线主机的第一通信总线（“C1总线”）的总线所有权的仲裁和用于多个C2总线主机的第二通信总线（“C2总线”）的总线所有权的装置和方法， 巴士大师。 该装置在耦合到C1总线的第一组件和耦合到C2总线的第二组件之间进一步执行DMA传输，而无需处理器辅助。

公开(公告)号：US20080082791A1

公开(公告)日：2008-04-03

申请号：US11540337

申请日：2006-09-29

Applicant: Srinivas Chennupaty ,  Avinash Sodani ,  Brent Boswell ,  Mark Seconi

Inventor： Srinivas Chennupaty ,  Avinash Sodani ,  Brent Boswell ,  Mark Seconi

IPC: G06F9/30

CPC classification number: G06F9/3836 ,  G06F9/30101 ,  G06F9/3824 ,  G06F9/3838 ,  G06F9/3855 ,  G06F9/3857 ,  G06F9/3861 ,  G06F9/462

Abstract: In one embodiment, the present invention includes a method for assigning a first identifier to a first instruction that is to write control information into a configuration register, assigning the first identifier to a second instruction that is to read the control information written by the first instruction, and storing the second instruction in a first structure of a processor with the first identifier. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括一种用于将第一标识符分配给第一指令的方法，该第一指令将控制信息写入配置寄存器，将第一标识符分配给第二指令，该第二指令将读取由第一指令写入的控制信息 并且将第二指令存储在具有第一标识符的处理器的第一结构中。 描述和要求保护其他实施例。

公开(公告)号：US20140032881A1

公开(公告)日：2014-01-30

申请号：US14042696

申请日：2013-09-30

Applicant: Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

Inventor： Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

IPC: G06F9/30

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

公开(公告)号：US20130290392A1

公开(公告)日：2013-10-31

申请号：US13844366

申请日：2013-03-15

Applicant: Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

Inventor： Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

IPC: G06F7/48

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

Abstract translation: 用于执行点积运算的方法，装置和程序装置。 在一个实施例中，一种装置包括执行第一指令的执行资源。 响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。

公开(公告)号：US20080077772A1

公开(公告)日：2008-03-27

申请号：US11526065

申请日：2006-09-22

Applicant: Ronen Zohar ,  Mohammad Abdallah ,  Boris Sabanin ,  Mark Seconi

Inventor： Ronen Zohar ,  Mohammad Abdallah ,  Boris Sabanin ,  Mark Seconi

IPC: G06F9/30

CPC classification number: G06F9/30112 ,  G06F9/30036 ,  G06F9/30043 ,  G06F9/30138 ,  G06F9/30185

Abstract: A method and apparatus for including in a processor instructions for performing select operations on packed or unpacked data. In one embodiment, a processor is coupled to a memory. The memory has stored therein first packed data in a source operand and a second packed data in a destination operand. The processor selects the first packed data if the control bit for the source operand is set to “1” and stores the data into the destination operand. Otherwise, the processor keeps the data in the destination operand. The final value of the destination operand is stored in memory.

Abstract translation: 一种用于在处理器中包括用于对打包或未打包的数据执行选择操作的指令的方法和装置。 在一个实施例中，处理器耦合到存储器。 存储器中存储有源操作数中的第一打包数据和目的地操作数中的第二打包数据。 如果源操作数的控制位设置为“1”，则处理器选择第一打包数据，并将数据存储到目标操作数中。 否则，处理器将数据保存在目标操作数中。 目标操作数的最终值存储在内存中。