公开(公告)号：US20120124264A1

公开(公告)日：2012-05-17

申请号：US13356999

申请日：2012-01-24

Applicant: Keshavan Tiruvallur ,  Rajesh Parthasarathy ,  James B. Crossland ,  Shivnanda Kaushik ,  Luke Hood

Inventor： Keshavan Tiruvallur ,  Rajesh Parthasarathy ,  James B. Crossland ,  Shivnanda Kaushik ,  Luke Hood

IPC: G06F13/24

CPC classification number: G06F13/24

Abstract: A technique to enable efficient interrupt communication within a computer system. In one embodiment, an advanced programmable interrupt controller (APlC) is interfaced via a set of bits within an APIC interface register using various interface instructions or operations, without using memory-mapped input/output (MMIO).

Abstract translation: 一种在计算机系统内实现高效中断通信的技术。 在一个实施例中，高级可编程中断控制器（AP1C）通过使用各种接口指令或操作的APIC接口寄存器内的一组位来进行接口，而不使用存储器映射的输入/输出（MMIO）。

公开(公告)号：US07305592B2

公开(公告)日：2007-12-04

申请号：US10882813

申请日：2004-06-30

Applicant: Gilbert Neiger ,  Andrew V. Anderson ,  Steven M. Bennett ,  Jason Brandt ,  Erik Cota-Robles ,  Stalinselvaraj Jeyasingh ,  Alain Kägi ,  Sanjoy K. Mondal ,  Rajesh Parthasarathy ,  Dion Rodgers ,  Lawrence O. Smith ,  Richard A. Uhlig

Inventor： Gilbert Neiger ,  Andrew V. Anderson ,  Steven M. Bennett ,  Jason Brandt ,  Erik Cota-Robles ,  Stalinselvaraj Jeyasingh ,  Alain Kägi ,  Sanjoy K. Mondal ,  Rajesh Parthasarathy ,  Dion Rodgers ,  Lawrence O. Smith ,  Richard A. Uhlig

IPC: G06F11/00

CPC classification number: G06F9/45533 ,  G06F11/0712 ,  G06F11/0775 ,  G06F11/0787 ,  G06F11/0793

Abstract: In one embodiment, information pertaining to a first fault occurring during operation of a virtual machine (VM) is stored in a first field. A second fault is detected while delivering the first fault to the VM, and a determination is made as to whether the second fault is associated with a transition of control to a virtual machine monitor (VMM). If this determination is positive, information pertaining to the second fault is stored in a second field, and control is transitioned to the VMM.

Abstract translation: 在一个实施例中，关于在虚拟机（VM）的操作期间发生的第一故障的信息被存储在第一字段中。 在向VM提供第一故障时检测到第二故障，并且确定第二故障是否与对虚拟机监视器（VMM）的控制转换相关联。 如果该确定是肯定的，则关于第二故障的信息被存储在第二场中，并且控制被转换到VMM。

公开(公告)号：US20070156986A1

公开(公告)日：2007-07-05

申请号：US11322757

申请日：2005-12-30

Applicant: Gilbert Neiger ,  Andrew Anderson ,  Steven Bennett ,  Rajesh Madukkarumukumana ,  Richard Uhlig ,  Rajesh Parthasarathy ,  Sebastian Schoenberg

Inventor： Gilbert Neiger ,  Andrew Anderson ,  Steven Bennett ,  Rajesh Madukkarumukumana ,  Richard Uhlig ,  Rajesh Parthasarathy ,  Sebastian Schoenberg

IPC: G06F12/14

CPC classification number: G06F12/1441 ,  G06F12/145 ,  G06F2009/45587

Abstract: Embodiments of apparatuses, methods, and systems for guests to access memory mapped devices are disclosed. In one embodiment, an apparatus includes evaluation logic and exit logic. The evaluation logic is to determine, in response to an attempt of a guest to access a device using a memory address mapped to the device and based on an access type, whether the access is allowed. The exit logic is to transfer control to a host if the evaluation logic determines that the access is not allowed.

Abstract translation: 公开了访客访问存储器映射设备的装置，方法和系统的实施例。 在一个实施例中，装置包括评估逻辑和退出逻辑。 评估逻辑是为了响应于访客访问使用映射到设备的存储器地址并基于访问类型访问设备的尝试，确定访问是否被允许。 如果评估逻辑确定不允许访问，退出逻辑将控制传送到主机。

公开(公告)号：US20140136746A1

公开(公告)日：2014-05-15

申请号：US13675868

申请日：2012-11-13

Applicant: Keshavan Tiruvallur ,  Rajesh Parthasarathy ,  James B. Crossland ,  Shivnandan Kaushik ,  Luke Hood

Inventor： Keshavan Tiruvallur ,  Rajesh Parthasarathy ,  James B. Crossland ,  Shivnandan Kaushik ,  Luke Hood

IPC: G06F13/24

CPC classification number: G06F13/24 ,  G06F13/26

Abstract: A technique to enable efficient interrupt communication within a computer system. In one embodiment, an advanced programmable interrupt controller (APIC) is interfaced via a set of bits within an APIC interface register using various interface instructions or operations, without using memory-mapped input/output (MMIO).

Abstract translation: 一种在计算机系统内实现高效中断通信的技术。 在一个实施例中，高级可编程中断控制器（APIC）通过使用各种接口指令或操作的APIC接口寄存器内的一组位而不使用存储器映射的输入/输出（MMIO）进行接口。

公开(公告)号：US20120079232A1

公开(公告)日：2012-03-29

申请号：US12890585

申请日：2010-09-24

Applicant: Glenn Hinton ,  Madhavan Parthasarathy ,  Rajesh Parthasarathy ,  Muthukumar Swaminathan ,  Raj Ramanujan ,  David Zimmerman ,  Larry O. Smith ,  Adrian C. Moga ,  Scott J. Cape ,  Wayne A. Downer ,  Robert S. Chappell

Inventor： Glenn Hinton ,  Madhavan Parthasarathy ,  Rajesh Parthasarathy ,  Muthukumar Swaminathan ,  Raj Ramanujan ,  David Zimmerman ,  Larry O. Smith ,  Adrian C. Moga ,  Scott J. Cape ,  Wayne A. Downer ,  Robert S. Chappell

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F12/023 ,  G06F12/0292 ,  G06F12/06 ,  G06F12/1009 ,  G06F2212/1028 ,  G06F2212/1041 ,  G06F2212/151 ,  G06F2212/205 ,  G06F2212/651 ,  Y02D10/13

Abstract: An apparatus, method, machine-readable medium, and system are disclosed. In one embodiment the apparatus is a micro-page table engine that includes logic that is capable of receiving a memory page request for a page in global memory address space. The apparatus also includes a translation lookaside buffer (TLB) that is capable of storing one or more memory page address translations. Additionally, the apparatus also has a page miss handler capable of performing a micro physical address lookup in a page miss handler tag table in response to the TLB not storing the memory page address translation for the page of memory referenced by the memory page request. The apparatus also includes memory management logic that is capable of managing the page miss handler tag table entries. The micro-page table engine allows the TLB to be an agent that determines whether data in a two-level memory hierarchy is in a hot region of memory or in a cold region of memory. When data is in the cold region of memory, the micro-page table engine fetches the data to the hot memory and a hot memory block is then pushed out to the cold memory area.

Abstract translation: 公开了一种装置，方法，机器可读介质和系统。 在一个实施例中，该装置是微页表引擎，其包括能够接收全局存储器地址空间中的页面的存储器页面请求的逻辑。 该装置还包括能够存储一个或多个存储器页面地址转换的翻译后备缓冲器（TLB）。 此外，该设备还具有能够响应于TLB不存储由存储器寻呼请求引用的存储器页面的存储器页面地址转换而在页面未命中处理器标签表中执行微物理地址查找的页面未命中处理程序。 该装置还包括能够管理页面未命中处理程序标签表条目的存储器管理逻辑。 微页表引擎允许TLB作为一个代理，确定二级存储器层次结构中的数据是在存储器的热区域还是在存储器的冷区域。 当数据处于存储器的冷区域时，微页表引擎将数据读取到热存储器，然后将热存储器块推出到冷存储器区域。

公开(公告)号：US20080071851A1

公开(公告)日：2008-03-20

申请号：US11524852

申请日：2006-09-20

Applicant: Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

Inventor： Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

IPC: G06F7/52

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

Abstract translation: 用于进行点积运算的方法，装置和程序装置。 在一个实施例中，一种装置包括执行第一指令的执行资源。 响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。

公开(公告)号：US20070006230A1

公开(公告)日：2007-01-04

申请号：US11173312

申请日：2005-06-30

Applicant: Gilbert Neiger ,  Richard Uhlig ,  Dion Rodgers ,  Jason Brandt ,  Rajesh Parthasarathy

Inventor： Gilbert Neiger ,  Richard Uhlig ,  Dion Rodgers ,  Jason Brandt ,  Rajesh Parthasarathy

IPC: G06F9/46

CPC classification number: G06F9/45533

Abstract: Embodiments of apparatuses and methods for guest processes to access registers are disclosed. In one embodiment, an apparatus includes an interface to a first register, shadow logic, evaluation logic, and exit logic. The shadow logic is to, in response to a guest attempt to write data to the first register, cause the data to be written to a second register. The evaluation logic is to determine, based on the value of the data, whether to transfer control to a host in response to the guest attempt. The exit logic is to transfer control to the host after the data is written to the second register if the evaluation logic determines to transfer control.

Abstract translation: 公开了访问进程访问寄存器的装置和方法的实施例。 在一个实施例中，装置包括到第一寄存器，影子逻辑，评估逻辑和退出逻辑的接口。 影子逻辑是为了响应客人尝试向第一寄存器写入数据，使数据被写入第二寄存器。 评估逻辑是基于数据的值来确定是否将控制转移给主机以响应客人尝试。 如果评估逻辑确定传输控制，则退出逻辑是在将数据写入第二寄存器之后将控制传送到主机。

公开(公告)号：US08838935B2

公开(公告)日：2014-09-16

申请号：US12890585

申请日：2010-09-24

Applicant: Glenn Hinton ,  Madhavan Parthasarathy ,  Rajesh Parthasarathy ,  Muthukumar Swaminathan ,  Raj Ramanujan ,  David Zimmerman ,  Larry O. Smith ,  Adrian C. Moga ,  Scott J. Cape ,  Wayne A. Downer ,  Robert S. Chappell

Inventor： Glenn Hinton ,  Madhavan Parthasarathy ,  Rajesh Parthasarathy ,  Muthukumar Swaminathan ,  Raj Ramanujan ,  David Zimmerman ,  Larry O. Smith ,  Adrian C. Moga ,  Scott J. Cape ,  Wayne A. Downer ,  Robert S. Chappell

IPC: G06F12/00 ,  G06F12/10 ,  G06F12/02

CPC classification number: G06F12/1027 ,  G06F12/023 ,  G06F12/0292 ,  G06F12/06 ,  G06F12/1009 ,  G06F2212/1028 ,  G06F2212/1041 ,  G06F2212/151 ,  G06F2212/205 ,  G06F2212/651 ,  Y02D10/13

Abstract: In one embodiment the apparatus is a micro-page table engine that includes logic that is capable of receiving a memory page request for a page in global memory address space. The apparatus also includes a translation lookaside buffer (TLB) that is capable of storing one or more memory page address translations. Additionally, the apparatus also has a page miss handler capable of performing a micro physical address lookup in a page miss handler tag table in response to the TLB not storing the memory page address translation for the page of memory referenced by the memory page request. The apparatus also includes memory management logic that is capable of managing the page miss handler tag table entries.

Abstract translation: 在一个实施例中，该装置是微页表引擎，其包括能够接收全局存储器地址空间中的页面的存储器页面请求的逻辑。 该装置还包括能够存储一个或多个存储器页面地址转换的翻译后备缓冲器（TLB）。 此外，该设备还具有能够响应于TLB不存储由存储器寻呼请求引用的存储器页面的存储器页面地址转换而在页面未命中处理器标签表中执行微物理地址查找的页面未命中处理程序。 该装置还包括能够管理页面未命中处理程序标签表条目的存储器管理逻辑。

公开(公告)号：US20140032881A1

公开(公告)日：2014-01-30

申请号：US14042696

申请日：2013-09-30

Applicant: Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

Inventor： Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

IPC: G06F9/30

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

公开(公告)号：US20130290392A1

公开(公告)日：2013-10-31

申请号：US13844366

申请日：2013-03-15

Applicant: Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

Inventor： Ronen Zohar ,  Mark Seconi ,  Rajesh Parthasarathy ,  Srinivas Chennupaty ,  Mark Buxton ,  Chuck Desylva

IPC: G06F7/48

CPC classification number: G06F17/10 ,  G06F7/48 ,  G06F7/5443 ,  G06F9/3001

Abstract: Method, apparatus, and program means for performing a dot-product operation. In one embodiment, an apparatus includes execution resources to execute a first instruction. In response to the first instruction, said execution resources store to a storage location a result value equal to a dot-product of at least two operands.

Abstract translation: 用于执行点积运算的方法，装置和程序装置。 在一个实施例中，一种装置包括执行第一指令的执行资源。 响应于第一指令，所述执行资源存储到存储位置，结果值等于至少两个操作数的点积。