公开(公告)号：US4392124A

公开(公告)日：1983-07-05

申请号：US256051

申请日：1981-04-21

Applicant: Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

Inventor： Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

IPC: H03M1/44 ,  H03M1/00 ,  H03K13/02

CPC classification number: H03M1/16

Abstract: This analog-ditigal coder determines the coefficients a.sub.o . . . a.sub.n in two stages:during the first stage, the generator processes voltages V.sub.R and V.sub.Ri with i=1 to k-1;during the second stage, the generator processes the voltages V.sub.R and V.sub.Ri with i=1 to n-k.A capacitive voltage divider (2.sup.k C, C) preceded by two sample and hold means (S.sub.3, C.sub.3, S.sub.4, C.sub.4) assures the division by 2.sup.k of the voltages processed during the second stage and their summation with the final voltage V.sub.R(k-1) produced during the first stage.

Abstract translation: 该模拟比特编码器确定系数ao。 的。 的。 分为两个阶段：在第一阶段期间，发电机用i = 1至k-1处理电压VR和VRi; 在第二级期间，发生器利用i = 1至n-k处理电压VR和VRi。 在两个采样和保持装置（S3，C3，S4，C4）之前的电容分压器（2kC，C）确保在第二级处理的电压除以2k，并将其与最终电压VR（k-1 ）。

公开(公告)号：US4488129A

公开(公告)日：1984-12-11

申请号：US419207

申请日：1982-09-17

Applicant: Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

Inventor： Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

IPC: H01L21/339 ,  G11C19/28 ,  H01L29/762 ,  H03H15/02 ,  H03H17/02

CPC classification number: H03H15/02 ,  G11C19/285

Abstract: In a device for current-reading of a quantity of electric charges, the control circuit for the first and second MOS transistors receives a constant potential and comprises:a third transistor, the drain and gate of which are connected to the constant potential and the source of which is connected to the drain and to the gate of the second transistor;a second capacitor connected through one of its terminals to the nodal point of the second and the third transistor.The device is employed for reading quantities of charges which arrive under the storage electrodes of charge-transfer filters.

Abstract translation: 在用于电量读取的电荷的装置中，用于第一和第二MOS晶体管的控制电路接收恒定电位，并且包括：第三晶体管，其漏极和栅极连接到恒定电位，源极 其连接到第二晶体管的漏极和栅极; 通过其一个端子连接到第二和第三晶体管的节点的第二电容器。 该装置用于读取到电荷转移过滤器的存储电极下方的电荷量。

公开(公告)号：US4377760A

公开(公告)日：1983-03-22

申请号：US152350

申请日：1980-05-22

Applicant: Roger Benoit-Gonin ,  Jean-Luc Berger ,  Sylvain Fontanes ,  Jean-Edgar Picquendar

Inventor： Roger Benoit-Gonin ,  Jean-Luc Berger ,  Sylvain Fontanes ,  Jean-Edgar Picquendar

IPC: G01R29/24 ,  H03K5/19 ,  G01R19/00 ,  H03H15/00 ,  H03K5/153

CPC classification number: G01R29/24

Abstract: An analog device for reading a quantity of electric charge, for example, in a transversal charge transfer filter. The device includes a capacitor and two MOS transistors which are connected in series to the point in the filter where the charge is to be read. The capacitor is connected to the common point of the two transistors which are controlled in phase opposition to insure charging of the capacitor. The capacitor maintains a potential at the charge reading point constant. Any variation in the quantity of charge under an electrode is converted into a variation of potential at the common point and this forms the read signal which is detected by means of a third MOS transistor.

Abstract translation: 用于读取电荷量的模拟装置，例如在横向电荷转移滤波器中。 该器件包括电容器和两个MOS晶体管，其串联连接到滤波器中要读取电荷的点。 电容器连接到两个晶体管的共同点，这两个晶体管的相位相互相互控制，以确保电容器的充电。 电容器保持电荷读数点的电位恒定。 电极下的电荷量的任何变化被转换成在公共点处的电位变化，并形成通过第三MOS晶体管检测的读取信号。

公开(公告)号：US4145676A

公开(公告)日：1979-03-20

申请号：US788779

申请日：1977-04-19

Applicant: Roger Benoit-Gonin ,  Jean L. Berger ,  Sylvain Fontanes

Inventor： Roger Benoit-Gonin ,  Jean L. Berger ,  Sylvain Fontanes

IPC: H01L21/339 ,  H01L29/76 ,  H01L29/762 ,  H01L29/768 ,  H01L29/772 ,  H01L29/78 ,  H03H15/02 ,  H03H7/28 ,  G11C19/28 ,  H01L27/10

CPC classification number: H01L29/76808 ,  H03H15/02

Abstract: An input stage for a transversal charge transfer filter, which suppresses parasitic image frequencies. It comprises two parallel channels to which the input signal is applied simultaneously. Sampling of the signal is performed in each channel with a periodicity Te, and a relative phase-shift of Te/2. The two samples are then added in order to eliminate components having periodicities in the neighborhood of Te. The present invention relates to low-pass filters using the phenomenon of electrical charge transfer occurring in a semiconductor. It relates more particularly to an input stage for this kind of CTD (Charge Transfer Device) filter, which attenuates parasitic frequencies. The design of CTD low-pass filters, often referred to as transversal filters, poses a classic problem due to the fact that the input stage is a sampling stage. In other words, when the input signal contains a component of frequency Fs close to the sampling frequency Fe, by a process of frequency mixing, two parasitic signals at the image frequencies Fe + Fs and Fe - Fs are created. Since we are concerned with a low-pass filter, the top image frequency (Fe + Fs) is automatically eliminated but the bottom image frequency (Fe - Fs) can be transmitted by the filter and appear in the output signal if the condition Fe - Fs

Abstract translation: 用于横向电荷转移滤波器的输入级，其抑制寄生图像频率。 它包括同时施加输入信号的两个并行通道。 在每个通道中以周期Te执行信号的采样，并且执行Te / 2的相对相移。 然后添加两个样品以消除在Te附近具有周期性的组分。

公开(公告)号：US4398099A

公开(公告)日：1983-08-09

申请号：US375680

申请日：1982-05-06

Applicant: Roger Benoit-Gonin ,  Jean-Luc Berger ,  Jean-Louis Coutures ,  Daniel Forster ,  Jean-Edgar Picquendar

Inventor： Roger Benoit-Gonin ,  Jean-Luc Berger ,  Jean-Louis Coutures ,  Daniel Forster ,  Jean-Edgar Picquendar

IPC: H03F3/00 ,  H03F3/16 ,  H03F3/45 ,  H03H11/04 ,  H03H15/02 ,  H03H19/00 ,  H03K17/56

CPC classification number: H03H15/02 ,  H03F3/005 ,  H03H19/00

Abstract: The switched-capacitance amplifier comprises n capacitors C.sub.11 to C.sub.1n which are periodically switched in parallel and in series, the n parallel-switched capacitors being charged simultaneously by the same voltage V.sub.E. An amplified voltage n.times.V.sub.E is obtained between the end terminals A and B of the n series-switched capacitors. Periodic switching of the n capacitors in parallel and in series is performed by means of MOS transistors T.sub.11 to T.sub.1(2n-1) and T.sub.21 to T.sub.2(n-1) which operate in the switching mode. The n capacitors and the MOS transistors are integrated on the same semiconductor substrate.

Abstract translation: 开关电容放大器包括并联并串联周期性地切换的n个电容器C11至C1n，n个并联开关电容器由相同的电压VE同时充电。 在n个串联开关电容器的端子A和B之间获得放大电压nxVE。 通过在切换模式下工作的MOS晶体管T11〜T1（2n-1）和T21〜T2（n-1），并联并串联n个电容器的周期性切换。 n个电容器和MOS晶体管集成在同一半导体衬底上。

公开(公告)号：US4355244A

公开(公告)日：1982-10-19

申请号：US52931

申请日：1979-06-28

Applicant: Roger Benoit-Gonin ,  Jean-Luc Berger ,  Jean-Louis Coutures

Inventor： Roger Benoit-Gonin ,  Jean-Luc Berger ,  Jean-Louis Coutures

IPC: G11C19/28 ,  G11C27/04 ,  H03H15/02 ,  H03K3/353

CPC classification number: G11C19/285 ,  H03H15/02

Abstract: A device for reading a quantity of electric charges arriving at a point B. Two MOS transistors Q2 and Q3 are connected in series and with one terminal to point B. A capacitor C.sub.A is connected to a common point A of the two transistors. A transistor control circuit charges the capacitor C.sub.A from a low potential V.sub.DD. The capacitor C.sub.A and the transistors Q2 and Q3 maintain a constant potential at the point B at the time of charge inflow. This results is a variation of potential at the common point A in accordance with the incoming charges at B. Thus, the variations of potential at point A is a measure of the charges arriving at point B.

Abstract translation: 用于读取到达点B的电荷量的装置。两个MOS晶体管Q2和Q3串联连接，一个端子连接到点B.电容器CA连接到两个晶体管的公共点A. 晶体管控制电路从低电位VDD对电容器CA充电。 电容器CA和晶体管Q2和Q3在电荷流入时在点B保持恒定的电位。 该结果是根据B处的进入电荷在公共点A处的电位的变化。因此，点A处的电位变化是到达点B的电荷的量度。

公开(公告)号：US4350976A

公开(公告)日：1982-09-21

申请号：US215134

申请日：1980-12-10

Applicant: Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

Inventor： Roger Benoit-Gonin ,  Jean L. Berger ,  Jean L. Coutures

IPC: H03M1/66 ,  H03M1/00 ,  H03K13/02

CPC classification number: H03M1/00 ,  H03M2201/02 ,  H03M2201/2241 ,  H03M2201/2266 ,  H03M2201/2291 ,  H03M2201/3105 ,  H03M2201/3178 ,  H03M2201/4135 ,  H03M2201/4212 ,  H03M2201/4233 ,  H03M2201/4262 ,  H03M2201/81 ,  H03M2201/8128 ,  H03M2201/814 ,  H03M2201/837

Abstract: Successive two-trip traversals of charges between gates G.sub.0 and G.sub.2 make it possible to obtain beneath gates G.sub.1 and G.sub.2 quantities of charges equal to Q.sub.R, Q.sub.R /2, Q.sub.R /2.sup.2 . . . Q.sub.R /2.sup.i. A readout device for reading charges and connected to gates G.sub.2 and G.sub.4 generates voltages V.sub.R and V.sub.Ri =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.i-1 .multidot.V.sub.R /2.sup.i-1 +V.sub.R /2.sup.i which are compared with a voltage sample V.sub.x to be coded in order to determine by successive approximations the coefficients a.sub.0 . . . a.sub.n which are equal to 0 or to 1 such that V.sub.x =a.sub.0 .multidot.V.sub.R +a.sub.1 .multidot.V.sub.R /2+ . . . +a.sub.n .multidot.V.sub.R /2.sup.n. Depending on the value of a.sub.i, each quantity of charges Q.sub.R /2.sup.i stored beneath gate G.sub.1 is removed beneath diode D.sub.e or stored beneath gate G.sub.3 and then transferred beneath gate G.sub.4.

Abstract translation: 栅极G0和G2之间的电荷的连续两次跳变使得可以获得栅极G1和G2之下的等于QR，QR / 2，QR / 22的电荷量。 。 。 QR / 2i 用于读取电荷并连接到门G2和G4的读出装置产生电压VR和VRi = a0xVR + a1xVR / 2 +。 。 。 + ai-1xVR / 2i-1 + VR / 2i，其与要编码的电压采样Vx进行比较，以便通过逐次逼近来确定系数a0。 。 。 a等于0或1，使得Vx = a0xVR + a1xVR / 2 +。 。 。 + anxVR / 2n。 根据ai的值，存储在栅极G1下方的每个电荷量QR / 2i在二极管De下方被去除或存储在栅极G3下方，然后在栅极G4下方传送。