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    Semiconductor integrated circuit device and test terminal arrangement method
    2.
    发明授权
    Semiconductor integrated circuit device and test terminal arrangement method 失效
    半导体集成电路器件和测试端子的布置方法

    公开(公告)号：US07843226B2

    公开(公告)日：2010-11-30

    申请号：US12585206

    申请日：2009-09-08

    申请人： Takayuki Momose

    发明人： Takayuki Momose

    IPC分类号： H03K19/00

    CPC分类号： G01R31/2884 ,  H01L24/06 ,  H01L27/0203 ,  H01L2224/05553 ,  H01L2224/06179 ,  H01L2924/12035 ,  H01L2924/14 ,  H01L2924/00

    摘要： A semiconductor integrated circuit device includes a column of first logic circuit cells arranged along a first side of a chip and a column of second logic circuit cells arranged along a second side orthogonal to the first side. At a corner part where the first side crosses the second side, a first test logic circuit cell is arranged to have its long side faced with a side of a cell at an end portion of the column of the first logic circuit cells and a second logic circuit cell is arranged to have its long side faced with a side of a cell at an end portion of the column of the second logic circuit cells. The first and the second test logic circuit cells are arranged so a that planar shapes thereof are symmetrical (mirror symmetrical) to each other with respect to a virtual line intermediate between the oblique sides arranged opposite to each other.

    摘要翻译： 半导体集成电路器件包括沿着芯片的第一侧布置的第一逻辑电路单元的列和沿着与第一侧正交的第二侧布置的第二逻辑电路单元的列。 在第一侧跨越第二侧的拐角部分，第一测试逻辑电路单元布置成使其长边面对第一逻辑电路单元的列的端部处的单元的一侧，第二逻辑 电路单元被布置成使其长边在第二逻辑电路单元的列的端部处面对单元的一侧。 第一和第二测试逻辑电路单元被布置成使得其平面形状相对于彼此相对布置的斜边之间的虚拟线彼此对称（镜面对称）。

    Semiconductor integrated circuit device and test terminal arrangement method
    3.
    发明申请
    Semiconductor integrated circuit device and test terminal arrangement method 失效

    公开(公告)号：US20100060313A1

    公开(公告)日：2010-03-11

    申请号：US12585206

    申请日：2009-09-08

    申请人： Takayuki Momose

    发明人： Takayuki Momose

    IPC分类号： H03K19/00

    CPC分类号： G01R31/2884 ,  H01L24/06 ,  H01L27/0203 ,  H01L2224/05553 ,  H01L2224/06179 ,  H01L2924/12035 ,  H01L2924/14 ,  H01L2924/00

    摘要： A semiconductor integrated circuit device includes a column of first logic circuit cells arranged along a first side of a chip and a column of second logic circuit cells arranged along a second side orthogonal to the first side. At a corner part where the first side crosses the second side, a first test logic circuit cell is arranged to have its long side faced with a side of a cell at an end portion of the column of the first logic circuit cells and a second logic circuit cell is arranged to have its long side faced with a side of a cell at an end portion of the column of the second logic circuit cells. The first and the second test logic circuit cells are arranged so a that planar shapes thereof are symmetrical (mirror symmetrical) to each other with respect to a virtual line intermediate between the oblique sides arranged opposite to each other.

    Novel Cercosporamide Derivative
    4.
    发明申请
    Novel Cercosporamide Derivative 审中-公开
    新型Cercosporamide衍生物

    公开(公告)号：US20090036492A1

    公开(公告)日：2009-02-05

    申请号：US11990289

    申请日：2006-08-08

    申请人： Akihiro Furukawa ,  Jun Ohsumi ,  Tsuyoshi Arita ,  Takehiro Fukuzaki ,  Kazushi Araki ,  Makoto Mori ,  Takayuki Momose ,  Takeshi Honda ,  Masanori Kuroha ,  Ryo Okuyama ,  Susumu Satoh

    发明人： Akihiro Furukawa ,  Jun Ohsumi ,  Tsuyoshi Arita ,  Takehiro Fukuzaki ,  Kazushi Araki ,  Makoto Mori ,  Takayuki Momose ,  Takeshi Honda ,  Masanori Kuroha ,  Ryo Okuyama ,  Susumu Satoh

    IPC分类号： A61K31/443 ,  C07D307/91 ,  C07D405/12 ,  A61K31/343

    CPC分类号： C07D307/91 ,  C07D405/12 ,  C07D407/12

    摘要： The present invention relates to a novel cercosporamide derivative, a pharmacologically acceptable salt thereof or an ester thereof which has an excellent hypoglycemic effect and is useful as a therapeutic and/or prophylactic agent for diabetes.A cercosporamide derivative having the general formula (I): [wherein X represents an oxygen atom or the like, R1 represents a hydrogen atom or a C1-C6 alkyl group, R2 represents a hydrogen atom, a C1-C6 alkyl group or a C1-C6 halogenated alkyl group, R3 represents a hydrogen atom or a C1-C6 alkyl group, R4 represents a C6-C10 aryl group which may be substituted with one to five group(s) independently selected from Substituent Group a, or the like, n represents 1, 2 or 3, and Substituent Group a represents a halogen atom, a C1-C6 alkyl group, a C1-C6 halogenated alkyl group, a C2-C6 alkenyl group, a C2-C6 alkynyl group, a C1-C6 alkoxy group, a C1-C6 halogenated alkoxy group, a C2-C6 alkenyloxy group, a C2-C6 alkynyloxy group and the like], a pharmacologically acceptable salt thereof or an ester thereof.

    摘要翻译： 本发明涉及一种具有优异的降血糖作用，可用作糖尿病治疗和/或预防剂的新颖的孢子虫素衍生物，其药理学上可接受的盐或其酯。 具有通式（I）的孢孢酰胺衍生物：[其中X表示氧原子等，R 1表示氢原子或C 1 -C 6烷基，R 2表示氢原子，C 1 -C 6烷基或C 1 -C 6卤代烷基，R 3表示氢原子或C 1 -C 6烷基，R 4表示可以被一至五个独立地选自取代基组a的基团取代的C 6 -C 10芳基等， n表示1,2或3，取代基组a表示卤素原子，C1-C6烷基，C1-C6卤代烷基，C2-C6烯基，C2-C6炔基，C1-C6 烷氧基，C1-C6卤代烷氧基，C2-C6链烯氧基，C2-C6炔氧基等]，其药理学上可接受的盐或其酯。

    BI-CMOS gate array semiconductor integrated circuits and internal cell structure involved in the same
    5.
    发明授权
    BI-CMOS gate array semiconductor integrated circuits and internal cell structure involved in the same 失效
    BI-CMOS门阵列半导体集成电路和内部单元结构相同

    公开(公告)号：US5497014A

    公开(公告)日：1996-03-05

    申请号：US300132

    申请日：1994-09-02

    申请人： Takayuki Momose

    发明人： Takayuki Momose

    IPC分类号： H01L21/82 ,  H01L27/118 ,  H01L27/10 ,  H01L29/76

    CPC分类号： H01L27/11896

    摘要： The invention provides a Bi-CMOS gate array semiconductor integrated circuit chip including a peripheral region including an input/output circuit region and a bonding pad region and an internal cell structure provided within an internal cell region involved in the semiconductor integrated circuit chip. The internal cell structure comprises MOS transistor cell units including a plurality of MOS transistors and bipolar transistor cell units including a plurality of bipolar transistors wherein a distribution ratio in the number of the MOS transistor cell units to the bipolar transistor cell units has such a variation that the distributed ratio is high in a region that requires driving of almost no or a small load while the distributed ratio is low in a region that requires driving of a large load.

    摘要翻译： 本发明提供了一种Bi-CMOS栅极阵列半导体集成电路芯片，其包括包括输入/​​输出电路区域和焊盘区域的外围区域和设置在涉及半导体集成电路芯片的内部单元区域内的内部单元结构。 内部单元结构包括包括多个MOS晶体管的MOS晶体管单元单元和包括多个双极晶体管的双极晶体管单元单元，其中MOS晶体管单元单元与双极晶体管单元单元的分配比例具有这样的变化： 在需要大负载驱动的区域中，分散比低的区域中，分布比例高，需要几乎不需要驱动或小负载的区域。