摘要:
A resin solution usable for forming a protection layer, including an organic solvent and a resol resin. The resin solution may further include any combination of a cross-linking agene or agent(s), a photo active compound (PAC) or compounds(s), and/or development accelerator or accelerator(s) a method forming a cured resin layer, including applying a resin solution, including a resol resin, directly or indirectly on a substrate and hard baking the resin solution to form the cured resin layer. The resin solution may include a resol resin and/or a novolac resin.
摘要:
A photoresist composition comprising a hydrogen-bonding compound and a thermosetting resin is provided. A method of forming a photoresist pattern is also provided. The method comprises forming a photoresist film on an object by coating the object with a photoresist composition including a hydrogen-bonding compound and a thermosetting resin. Then, the photoresist film is partially removed to form the photoresist pattern.
摘要:
In a semiconductor device fabrication method and in a product formed according to the method, a photosensitive polyimide layer (PSPL) layer is applied to a semiconductor device in a manner which overcomes the limitations of the conventional approaches. The beneficial qualities of an added photoresist layer are utilized to avoid unwanted development of the underlying PSPL layer. In this manner, cracking of the PSPL layer is mitigated or eliminated, reducing the device soft error rate (SER) and increasing device yield. This is accomplished in a reliable and low-cost approach that employs standard device fabrication techniques.
摘要:
In a semiconductor device fabrication method and in a product formed according to the method, a photosensitive polyimide layer (PSPL) layer is applied to a semiconductor device in a manner which overcomes the limitations of the conventional approaches. The beneficial qualities of an added photoresist layer are utilized to avoid unwanted development of the underlying PSPL layer. In this manner, cracking of the PSPL layer is mitigated or eliminated, reducing the device soft error rate (SER) and increasing device yield. This is accomplished in a reliable and low-cost approach that employs standard device fabrication techniques.