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公开(公告)号：US20180040538A1
公开(公告)日：2018-02-08
申请号：US15783193
申请日：2017-10-13
Applicant: ABB Schweiz AG
Inventor： Juergen Schuderer , Fabian Mohn , Didier Cottet , Felix Traub , Daniel Kearney
IPC: H01L23/473 , H01L23/498 , H01L23/31 , H01L29/16 , H01L25/07 , H01L23/00
CPC classification number: H01L23/473 , H01L23/3142 , H01L23/49844 , H01L24/48 , H01L24/49 , H01L25/071 , H01L29/1608 , H01L2224/33 , H01L2224/48091 , H01L2924/00014
Abstract: A power electronics module comprises a first liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the first liquid cooler comprises a metal body providing a first terminal of the power electronics module; a second liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the second liquid cooler comprises a metal body providing a second terminal of the power electronics module; a plurality of semiconductor chips arranged between the first liquid cooler and the second liquid cooler, such that a first electrode of each semiconductor chip is bonded to the first liquid cooler, such that the first electrode is in electrical contact with the first liquid cooler, and an opposite second electrode of each semiconductor chip is in electrical contact with the second liquid cooler; and an insulating encapsulation, formed by molding the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips into an insulation material, such that the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips are at least partially embedded onto the insulation material.
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公开(公告)号：US10283436B2
公开(公告)日：2019-05-07
申请号：US15783193
申请日：2017-10-13
Applicant: ABB Schweiz AG
Inventor： Juergen Schuderer , Fabian Mohn , Didier Cottet , Felix Traub , Daniel Kearney
IPC: H01L23/473 , H01L25/07 , H01L23/31 , H01L23/498 , H01L23/00 , H01L29/16
Abstract: A power electronics module comprises a first liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the first liquid cooler comprises a metal body providing a first terminal of the power electronics module; a second liquid cooler comprising a cooling channel for receiving a cooling liquid, wherein the second liquid cooler comprises a metal body providing a second terminal of the power electronics module; a plurality of semiconductor chips arranged between the first liquid cooler and the second liquid cooler, such that a first electrode of each semiconductor chip is bonded to the first liquid cooler, such that the first electrode is in electrical contact with the first liquid cooler, and an opposite second electrode of each semiconductor chip is in electrical contact with the second liquid cooler; and an insulating encapsulation, formed by molding the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips into an insulation material, such that the first liquid cooler, the second liquid cooler and the plurality of semiconductor chips are at least partially embedded onto the insulation material.
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公开(公告)号：US20190355634A1
公开(公告)日：2019-11-21
申请号：US16529295
申请日：2019-08-01
Applicant: ABB Schweiz AG
Inventor： Chunlei Liu , Juergen Schuderer , Franziska Brem , Munaf Rahimo , Peter Karl Steimer , Franc Dugal
IPC: H01L23/051 , H01L23/62 , H01L23/492 , H01L23/00 , H01L25/07 , H01L29/16
Abstract: A power semiconductor device includes a base plate; a Si chip including a Si substrate, the Si chip attached to the base plate; a first metal preform pressed with a first press pin against the Si chip; a wide bandgap material chip comprising a wide bandgap substrate and a semiconductor switch provided in the wide bandgap substrate, the wide bandgap material chip attached to the base plate; and a second metal preform pressed with a second press pin against the wide bandgap material chip; the Si chip and the wide bandgap material chip are connected in parallel via the base plate and via the first press pin and the second press pin; the first metal preform is adapted for forming a conducting path through the Si chip, when heated by an overcurrent; and the second metal preform is adapted for forming an temporary conducting path through the wide bandgap material chip or an open circuit, when heated by an overcurrent.
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Patent Agency Ranking
公开(公告)号：US20180366400A1
公开(公告)日：2018-12-20
申请号：US16111984
申请日：2018-08-24
Applicant: ABB Schweiz AG
Inventor： Fabian Mohn , Juergen Schuderer , Felix Traub
IPC: H01L23/498 , H01L23/373 , H01L23/14 , H01L23/538 , H01L25/07 , H05K1/02 , H05K1/18 , H01L23/00
Abstract: A power module comprises at least one power semiconductor device with an electrical top contact area on a top side; and a multi-layer circuit board with multiple electrically conducting layers which are separated by multiple electrically isolating layers, the electrically isolating layers being laminated together with the electrically conducting layers; wherein the multi-layer circuit board has at least one cavity, which is opened to a top side of the multi-layer circuit board, which cavity reaches through at least two electrically conducting layers; wherein the power semiconductor device is attached with a bottom side to a bottom of the cavity; and wherein the power semiconductor device is electrically connected to a top side of the multi-layer circuit board with a conducting member bonded to the top contact area and bonded to the top side of the multi-layer circuit board.
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公开(公告)号：US10546795B2
公开(公告)日：2020-01-28
申请号：US15971262
申请日：2018-05-04
Applicant: ABB Schweiz AG
Inventor： Lise Donzel , Juergen Schuderer , Jagoda Dobrzynska , Jan Vobecky
Abstract: The present application relates to a power semiconductor device, including a substrate having a first side and a second side, the first side and the second side being located opposite to each other, wherein the first side includes a cathode and the second side includes an anode, wherein a junction termination of a p/n-junction is provided at at least one surface of the substrate, preferably at at least one of the first side and the second side, the junction termination is coated by a passivating coating, the passivating coating including at least one material selected from the group consisting of an inorganic-organic composite material, parylene, and a phenol resin comprising polymeric particles. A device as described above thus addresses issues of passivation of junction terminations and thus prevents or at least reduces the danger of fatal defects such as unstable device operation caused by changes in film properties, instability, water permeability, permeability of movable ions such as sodium, pinholes and cracks, and aluminum metal disconnection or corrosion due to degradation and stress.
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公开(公告)号：US10283454B2
公开(公告)日：2019-05-07
申请号：US15819693
申请日：2017-11-21
Applicant: ABB Schweiz AG
Inventor： Felix Traub , Fabian Mohn , Juergen Schuderer , Daniel Kearney , Slavo Kicin
IPC: H01L23/538 , H01L23/64 , H01L25/07 , H01L29/00 , H01L23/373 , H01L23/498
Abstract: The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane. The first plane is spaced apart from the second plane in a direction normal to the first plane, whereby the first substrate is based on a direct bonded copper substrate and the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a layer of a printed circuit board is provided for carrying the diode. Alternatively, the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a foil is provided for carrying the diode, wherein the foil comprises an electrically insulating main body and an electrically conductive structure provided thereon for carrying the diode. Such a power semiconductor module provides a low stray inductance and/or may be built easily.
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公开(公告)号：US20180254233A1
公开(公告)日：2018-09-06
申请号：US15971262
申请日：2018-05-04
Applicant: ABB Schweiz AG
Inventor： Lise Donzel , Juergen Schuderer , Jagoda Dobrzynska , Jan Vobecky
Abstract: The present application relates to a power semiconductor device, including a substrate having a first side and a second side, the first side and the second side being located opposite to each other, wherein the first side includes a cathode and the second side includes an anode, wherein a junction termination of a p/n-junction is provided at at least one surface of the substrate, preferably at at least one of the first side and the second side, the junction termination is coated by a passivating coating, the passivating coating including at least one material selected from the group consisting of an inorganic-organic composite material, parylene, and a phenol resin comprising polymeric particles. A device as described above thus addresses issues of passivation of junction terminations and thus prevents or at least reduces the danger of fatal defects such as unstable device operation caused by changes in film properties, instability, water permeability, permeability of movable ions such as sodium, pinholes and cracks, and aluminum metal disconnection or corrosion due to degradation and stress.
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公开(公告)号：US20180090441A1
公开(公告)日：2018-03-29
申请号：US15819693
申请日：2017-11-21
Applicant: ABB Schweiz AG
Inventor： Felix Traub , Fabian Mohn , Juergen Schuderer , Daniel Kearney , Slavo Kicin
IPC: H01L23/538 , H01L23/64 , H01L25/07 , H01L29/00
CPC classification number: H01L23/5385 , H01L23/3735 , H01L23/49811 , H01L23/645 , H01L25/072 , H01L29/00 , H01L2224/48091 , H01L2224/48137 , H01L2224/49111 , H01L2924/19107 , H01L2924/00014
Abstract: The present invention relates to a power semiconductor module, comprising at least two power semiconductor devices, wherein the at least two power semiconductor devices comprise at least one power semiconductor transistor and at least one power semiconductor diode, wherein at least a first substrate is provided for carrying the power semiconductor transistor in a first plane, the first plane lying parallel to the plane of the substrate, wherein the power semiconductor diode is provided in a second plane, wherein the first plane is positioned between the substrate and the second plane in a direction normal to the first plane and wherein the first plane is spaced apart from the second plane in a direction normal to the first plane. The first plane is spaced apart from the second plane in a direction normal to the first plane, whereby the first substrate is based on a direct bonded copper substrate and the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a layer of a printed circuit board is provided for carrying the diode. Alternatively, the first substrate is a direct-bonded copper substrate for carrying the transistor, on which first substrate a foil is provided for carrying the diode, wherein the foil comprises an electrically insulating main body and an electrically conductive structure provided thereon for carrying the diode. Such a power semiconductor module provides a low stray inductance and/or may be built easily.
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