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公开(公告)号：US10218978B2
公开(公告)日：2019-02-26
申请号：US14873037
申请日：2015-10-01
Applicant: ARM Limited
Inventor： Ola Hugosson , Tomas Edsö , Erik Persson
IPC: H04N19/172 , H04N19/127 , H04N19/137 , H04N19/174 , H04N19/142 , H04N19/46
Abstract: A data processing system comprises a video processor (3). The data processing system is configured to, when a new frame (10) is to be encoded by the video processor (3), determine for a sub-region of a set of plural sub-regions that the new frame (10) is divided into, whether the sub-region has changed from a previous frame (11), and to control the encoding operation for the new frame (10) on the basis of the determination, e.g. to avoid performing motion estimation.
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公开(公告)号：US09906792B2
公开(公告)日：2018-02-27
申请号：US14596971
申请日：2015-01-14
Applicant: ARM Limited
Inventor： Dominic Hugo Symes , Ola Hugosson , Erik Persson
IPC: H04N19/124 , H04N19/13 , H04N19/176 , H04N19/15 , H04N19/91
CPC classification number: H04N19/124 , H04N19/13 , H04N19/15 , H04N19/176 , H04N19/91
Abstract: A video encoder and method of video encoding are provided. At an encoding stage a selected degree of quantization is applied to the encoding of macroblocks of the input video sequence and quantized part-encoded macroblocks are generated. Quantization circuitry in the encoding stage is configured to select the selected degree of quantization for each macroblock in a current slice in dependence on a complexity estimate indicative of the expected entropy encoding complexity of a predetermined set of the quantized part-encoded macroblocks defined for that macroblock.
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公开(公告)号：US09471493B2
公开(公告)日：2016-10-18
申请号：US14557649
申请日：2014-12-02
Applicant: ARM LIMITED
Inventor： Erik Persson , Ola Hugosson
CPC classification number: G06F12/0808 , G06F12/0895
Abstract: A data processing apparatus and corresponding method of data processing are provided. The data processing apparatus comprises a temporary data store configured to store data items retrieved from a memory, wherein the temporary data store selects one of its plural data storage locations in which to store a newly retrieved data item according to a predetermined circular sequence. An index data store is configured to store index items corresponding to the data items stored in the temporary data store, wherein presence of a valid index item in the index data store is indicative of a corresponding data item in the temporary data store. Invalidation control circuitry performs a rolling invalidation process with respect to the index items stored in the index data store, comprising sequentially processing the index items stored in the index data store and selectively marking the index items as invalid according to a predetermined criterion.
Abstract translation: 提供了一种数据处理装置和相应的数据处理方法。 数据处理装置包括临时数据存储器，被配置为存储从存储器检索的数据项，其中临时数据存储器根据预定的循环序列选择其中存储新检索的数据项的多个数据存储位置中的一个。 索引数据存储器被配置为存储与存储在临时数据存储中的数据项相对应的索引项，其中，索引数据存储中的有效索引项的存在指示临时数据存储中的对应的数据项。 无效化控制电路对存储在索引数据存储器中的索引项执行滚动无效处理，包括依次处理存储在索引数据存储器中的索引项，并根据预定标准有选择地将索引项标记为无效。
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公开(公告)号：US10283073B2
公开(公告)日：2019-05-07
申请号：US14873030
申请日：2015-10-01
Applicant: ARM Limited
Inventor： Tomas Edsö , Ola Hugosson , Dominic Symes
Abstract: A video processing system comprises a video processor and an output buffer. When a new frame is to be written to the output buffer, the video processing system determines (12) for at least a portion of the new frame whether the portion of the new frame has a particular property. When it is determined that that the portion of the new frame has the particular property (14), when a block of data representing a particular region of the portion of the new frame is to be written to the output buffer, it is compared to at least one block of data already stored in the output buffer, and a determination is made whether or not to write the block of data to the output buffer on the basis of the comparison. When it is determined that the portion of the new frame does not have the particular property (16), the portion of the new frame is written to the output buffer.
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公开(公告)号：US09213650B2
公开(公告)日：2015-12-15
申请号：US14560464
申请日：2014-12-04
Applicant: ARM Limited
Inventor： Erik Persson , Ola Hugosson , Andreas Bjorklund
CPC classification number: G06F12/1018 , G06F12/1027 , G06F12/122
Abstract: A data processing apparatus is provided comprising a plurality of master devices configured to issue memory access requests including virtual addresses. A memory management unit is configured to receive memory access requests and to translate a virtual address included in a memory access request from a requesting master device into a physical address indicating a storage location in memory. The memory management unit has an internal storage unit having a plurality of entries wherein indications of corresponding virtual address portions and physical address portions are stored. The memory management unit is configured to select an entry of the internal storage unit in dependence on the virtual address and an identifier of the requesting master device. Conflict between the master devices in their usage of the internal storage unit is thus avoided.
Abstract translation: 提供了一种数据处理装置，包括被配置为发布包括虚拟地址的存储器访问请求的多个主设备。 存储器管理单元被配置为接收存储器访问请求并将包括在存储器访问请求中的虚拟地址从请求主设备转换成指示存储器中的存储位置的物理地址。 存储器管理单元具有内部存储单元，其具有多个条目，其中存储对应的虚拟地址部分和物理地址部分的指示。 存储器管理单元被配置为根据虚拟地址和请求主设备的标识符来选择内部存储单元的条目。 因此避免了主设备在使用内部存储单元时的冲突。
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Patent Agency Ranking
公开(公告)号：US10652563B2
公开(公告)日：2020-05-12
申请号：US16199624
申请日：2018-11-26
Applicant: ARM Limited
Inventor： Ola Hugosson , Dominic Hugo Symes
IPC: H04N19/436 , H04N19/44 , H04N19/172
Abstract: A video decoder configured to decode an encoded video bitstream comprises a first parsing unit and a second parsing unit, each configured to independently parse the encoded video bitstream to derive parsing state information therefrom on which subsequent parsing of the encoded video bitstream at least partially depends and to identify macroblock information for decoding. The encoded video bitstream comprises frame header information defining a sequence of frames and each frame is composed of macroblocks represented by macroblock information. A control unit of the video encoder allocates each frame of macroblock information to one of the two parsing units to parse. The two parsing units are both configured to parse frame header information to thereby each derive parsing state information for the encoded video bitstream, and the two parsing unit are each configured to parse macroblock information allocated to them, skipping macroblock information allocated to the other parsing unit.
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公开(公告)号：US10440360B2
公开(公告)日：2019-10-08
申请号：US15177685
申请日：2016-06-09
Applicant: ARM Limited
Inventor： Tomas Edsö , Ola Hugosson
IPC: H04N19/423 , H04N19/115 , H04N19/53 , H04N19/59 , H04N19/172 , H04N19/182 , H04N19/63 , H04N19/96 , H04N19/44 , H04N19/85
Abstract: A video processing system includes a video processing unit (VPU) and one or more display processing units, all having access to external memory. Video data representing frames to be displayed is generated. The VPU generates pixel data representing the frames and stores it in memory. The display processing units then read the pixel data to display the frames. The VPU is configured to generate and store in memory pixel data representing reference frames for the sequence of video frames at the full resolution of the reference frame and also at at least one lower resolution to the full resolution.
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公开(公告)号：US20160366408A1
公开(公告)日：2016-12-15
申请号：US15177685
申请日：2016-06-09
Applicant: ARM Limited
Inventor： Tomas Edsö , Ola Hugosson
IPC: H04N19/115 , H04N19/172 , H04N19/53 , H04N19/182
CPC classification number: H04N19/115 , H04N19/172 , H04N19/182 , H04N19/423 , H04N19/44 , H04N19/53 , H04N19/59 , H04N19/63 , H04N19/85 , H04N19/96
Abstract: A video processing system includes a video processing unit (VPU) and one or more display processing units, all having access to external memory. Video data representing frames to be displayed is generated. The VPU generates pixel data representing the frames and stores it in memory. The display processing units then read the pixel data to display the frames. The VPU is configured to generate and store in memory pixel data representing reference frames for the sequence of video frames at the full resolution of the reference frame and also at at least one lower resolution to the full resolution.
Abstract translation: 视频处理系统包括视频处理单元（VPU）和一个或多个显示处理单元，全部具有对外部存储器的访问。 生成表示要显示的帧的视频数据。 VPU生成表示帧的像素数据并将其存储在存储器中。 然后，显示处理单元读取像素数据以显示帧。 VPU被配置为在存储器中生成并存储表示参考帧的全分辨率的视频帧序列的参考帧的像素数据，并且还以至少一个较低分辨率存储到全分辨率。
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公开(公告)号：US20160100172A1
公开(公告)日：2016-04-07
申请号：US14873037
申请日：2015-10-01
Applicant: ARM Limited
Inventor： Ola Hugosson , Tomas Edsö , Erik Persson
IPC: H04N19/172 , H04N19/142 , H04N19/176
CPC classification number: H04N19/127 , H04N19/137 , H04N19/142 , H04N19/174 , H04N19/46
Abstract: A data processing system comprises a video processor (3). The data processing system is configured to, when a new frame (10) is to be encoded by the video processor (3), determine for a sub-region of a set of plural sub-regions that the new frame (10) is divided into, whether the sub-region has changed from a previous frame (11), and to control the encoding operation for the new frame (10) on the basis of the determination, e.g. to avoid performing motion estimation.
Abstract translation: 数据处理系统包括视频处理器（3）。 数据处理系统被配置为当新的帧（10）将由视频处理器（3）编码时，确定新帧（10）被划分的多个子区域的集合的子区域 进入，子区域是否已经从先前帧（11）改变，并且基于该确定来控制新帧（10）的编码操作，例如 以避免执行运动估计。
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公开(公告)号：US20160098814A1
公开(公告)日：2016-04-07
申请号：US14873030
申请日：2015-10-01
Applicant: ARM Limited
Inventor： Tomas Edsö , Ola Hugosson , Dominic Symes
CPC classification number: G09G5/001 , G09G5/393 , G09G2320/103 , G09G2340/02 , G09G2340/0428 , G09G2350/00 , G09G2360/12 , G09G2360/121 , G09G2360/18
Abstract: A video processing system comprises a video processor and an output buffer. When a new frame is to be written to the output buffer, the video processing system determines (12) for at least a portion of the new frame whether the portion of the new frame has a particular property. When it is determined that that the portion of the new frame has the particular property (14), when a block of data representing a particular region of the portion of the new frame is to be written to the output buffer, it is compared to at least one block of data already stored in the output buffer, and a determination is made whether or not to write the block of data to the output buffer on the basis of the comparison. When it is determined that the portion of the new frame does not have the particular property (16), the portion of the new frame is written to the output buffer.
Abstract translation: 视频处理系统包括视频处理器和输出缓冲器。 当要将新帧写入输出缓冲器时，视频处理系统为新帧的至少一部分确定（12）新帧的部分是否具有特定属性。 当确定新帧的部分具有特定属性（14）时，当表示新帧的该部分的特定区域的数据块将被写入输出缓冲器时，将其与 已经存储在输出缓冲器中的至少一个数据块，并且基于该比较来确定是否将数据块写入输出缓冲器。 当确定新帧的部分不具有特定属性（16）时，新帧的部分被写入输出缓冲器。
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