公开(公告)号：US20140136873A1

公开(公告)日：2014-05-15

申请号：US13676805

申请日：2012-11-14

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Mauricio BRETERNITZ ,  James M. O'CONNOR ,  Gabriel H. LOH ,  Yasuko ECKERT ,  Mithuna THOTTETHODI ,  Srilatha MANNE ,  Bradford M. BECKMANN

IPC: G06F1/28

CPC classification number: G06F1/3275 ,  Y02D10/14 ,  Y02D50/20

Abstract: A device receives an indication that a memory bank is to be powered up, and determines, based on receiving the indication, power scores corresponding to powered down memory banks. Each power score corresponds to a power metric associated with powering up a powered down memory bank. The device powers up a selected memory bank based on the plurality of power scores.

Abstract translation: 设备接收到存储器组将被加电的指示，并且基于接收到该指示确定对应于掉电存储器组的功率分数。 每个功率分数对应于与断电存储器组的加电相关联的功率度量。 设备基于多个功率得分来加电所选择的存储体。

公开(公告)号：US20140136870A1

公开(公告)日：2014-05-15

申请号：US13676863

申请日：2012-11-14

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： Mauricio BRETERNITZ ,  James M. O'CONNOR ,  Gabriel H. LOH ,  Yasuko ECKERT ,  Mithuna THOTTETHODI ,  Srilatha MANNE ,  Bradford M. BECKMANN

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/3225 ,  G06F1/3275 ,  G06F1/3287 ,  G06F12/0802 ,  G11C7/1063 ,  Y02D10/14 ,  Y02D10/171

Abstract: A device receives an indication that a memory bank is to be powered down, and determines, based on receiving the indication, shutdown scores corresponding to powered up memory banks. Each shutdown score is based on a shutdown metric associated with powering down a powered up memory bank. The device may power down a selected memory bank based on the shutdown scores.

Abstract translation: 设备接收到存储器组要断电的指示，并且基于接收到指示确定与加电的存储体相对应的关断分数。 每个停机分数都是基于与断电加电存储器相关联的停机度量。 该设备可以基于关闭分数关闭选定的存储体。

公开(公告)号：US20160170887A1

公开(公告)日：2016-06-16

申请号：US14569175

申请日：2014-12-12

Applicant: Advanced Micro Devices, Inc.

Inventor： Syed Ali R. JAFRI ,  Yasuko ECKERT ,  Srilatha MANNE ,  Mithuna S. THOTTETHODI ,  Gabriel H. LOH

IPC: G06F12/08 ,  G06F12/12

CPC classification number: G06F12/0833 ,  G06F12/0868 ,  G06F12/0871 ,  G06F12/0891 ,  G06F12/121 ,  G06F12/126 ,  G06F12/128 ,  G06F2212/62 ,  Y02D10/13

Abstract: To efficiently transfer of data from a cache to a memory, it is desirable that more data corresponding to the same page in the memory be loaded in a line buffer. Writing data to a memory page that is not currently loaded in a row buffer requires closing an old page and opening a new page. Both operations consume energy and clock cycles and potentially delay more critical memory read requests. Hence it is desirable to have more than one write going to the same DRAM page to amortize the cost of opening and closing DRAM pages. A desirable approach is batch write backs to the same DRAM page by retaining modified blocks in the cache until a sufficient number of modified blocks belonging to the same memory page are ready for write backs.

Abstract translation: 为了有效地将数据从高速缓存传输到存储器，期望将与存储器中的相同页面相对应的更多数据加载到行缓冲器中。 将数据写入当前未加载到行缓冲区的内存页面时，需要关闭旧页面并打开新页面。 两种操作都消耗能量和时钟周期，并可能延迟更多关键的存储器读取请求。 因此，期望具有多于一个写入同一DRAM页面的写入以分摊打开和关闭DRAM页面的成本。 期望的方法是通过将修改的块保留在高速缓存中来批量回写到相同的DRAM页面，直到属于同一存储器页面的足够数量的修改的块准备好回写。