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公开(公告)号：US20240126327A1
公开(公告)日：2024-04-18
申请号：US17966700
申请日：2022-10-14
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Chao Wei LIU , Wei-Hao CHANG , Yung-I YEH , Jen-Chieh KAO , Tun-Ching PI , Ming-Hung CHEN , Hui-Ping JIAN , Shang-Lin WU
IPC: G06F1/16
CPC classification number: G06F1/163 , G06F1/1632
Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.
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公开(公告)号：US20200098709A1
公开(公告)日：2020-03-26
申请号：US16453780
申请日：2019-06-26
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Cheng-Nan LIN , Wei-Tung CHANG , Jen-Chieh KAO , Huei-Shyong CHO
Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.
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公开(公告)号：US20240249988A1
公开(公告)日：2024-07-25
申请号：US18099056
申请日：2023-01-19
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Yu-Chang CHEN , Wei-Tung CHANG , Jen-Chieh KAO
IPC: H01L23/31 , H01L21/56 , H01L23/538
CPC classification number: H01L23/315 , H01L21/563 , H01L21/568 , H01L23/3128 , H01L23/5381 , H01L23/5385 , H01L23/5389
Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a substrate, an electronic component, an intermediate structure and a protective layer. The electronic component is disposed over the substrate. The intermediate structure is disposed over the substrate and comprises an interposer and a conductive element on the interposer. The protective layer is disposed over the substrate and has an upper surface covering the electronic component and being substantially level with an upper surface of the conductive element.
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公开(公告)号：US20220344246A1
公开(公告)日：2022-10-27
申请号：US17239482
申请日：2021-04-23
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Chang-Lin YEH , Jen-Chieh KAO
IPC: H01L23/498 , H01L25/10 , H01L23/31 , H01L25/00
Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.
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公开(公告)号：US20190393126A1
公开(公告)日：2019-12-26
申请号：US16262762
申请日：2019-01-30
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Shiu-Fang YEN , Chang-Lin YEH , Jen-Chieh KAO
IPC: H01L23/367 , H01L25/065 , H01L23/00 , H01L23/31 , H01L23/373 , H01L23/498 , H01L23/66 , H01L21/48 , H01L21/56 , H01Q1/38
Abstract: A semiconductor package device includes a substrate, an electronic component, and a thermal conductive layer. The electronic component is disposed on the substrate and includes a first surface facing away from the substrate. The thermal conductive layer is disposed above the first surface of the electronic component. The thermal conductive layer includes a plurality of portions spaced apart from each other.
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Patent Agency Ranking
公开(公告)号：US20230361060A1
公开(公告)日：2023-11-09
申请号：US18223525
申请日：2023-07-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Cheng-Nan LIN , Wei-Tung CHANG , Jen-Chieh KAO , Huei-Shyong CHO
CPC classification number: H01L23/66 , H01L23/3128 , H01L23/49833 , H01L23/49822 , H01L23/49838 , H01L21/4853 , H01L21/4857 , H01Q1/2283 , H01L24/16 , H01Q1/243
Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.
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公开(公告)号：US20220384289A1
公开(公告)日：2022-12-01
申请号：US17884515
申请日：2022-08-09
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Yi CHEN , Chang-Lin YEH , Jen-Chieh KAO
IPC: H01L23/31 , H01L23/498 , H01L23/66 , H01Q1/22 , H01L23/00 , H01Q19/10 , H01Q13/10 , H01L23/10 , H01Q21/06
Abstract: A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.
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公开(公告)号：US20210305181A1
公开(公告)日：2021-09-30
申请号：US17347220
申请日：2021-06-14
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Cheng-Nan LIN , Wei-Tung CHANG , Jen-Chieh KAO , Huei-Shyong CHO
Abstract: An electronic device package includes a first substrate, a second substrate and a conductive layer. The first substrate includes a first bonding pad, and a cavity exposing the first bonding pad. The second substrate is laminated on the first substrate. The second substrate includes a second bonding pad at least partially inserting into the cavity of the first substrate. The conductive layer is disposed in the cavity and at least between the first bonding pad and the second bonding pad to connect the first bonding pad and the second bonding pad.
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公开(公告)号：US20240429115A1
公开(公告)日：2024-12-26
申请号：US18830517
申请日：2024-09-10
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Yi CHEN , Chang-Lin YEH , Jen-Chieh KAO
IPC: H01L23/31 , H01L23/00 , H01L23/10 , H01L23/498 , H01L23/66 , H01Q1/22 , H01Q13/10 , H01Q19/10 , H01Q21/06
Abstract: A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.
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公开(公告)号：US20240145357A1
公开(公告)日：2024-05-02
申请号：US18402649
申请日：2024-01-02
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor： Chang-Lin YEH , Jen-Chieh KAO
IPC: H01L23/498 , H01L23/31 , H01L25/00 , H01L25/10
CPC classification number: H01L23/49805 , H01L23/3121 , H01L25/105 , H01L25/50
Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.
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