公开(公告)号：US11756904B2

公开(公告)日：2023-09-12

申请号：US16895989

申请日：2020-06-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuanhao Yu ,  Cheng-Lin Ho ,  Yu-Lin Shih ,  Shih-Chun Li

IPC: H01L23/66 ,  H01Q1/22

CPC classification number: H01L23/66 ,  H01Q1/2283 ,  H01L2223/6616 ,  H01L2223/6677

Abstract: A semiconductor device package includes a substrate, a reflector, a radiator and a first director. The reflector is disposed on a surface of the substrate. The radiator is disposed over the reflector. The first director is disposed over the radiator. The reflector, the radiator and the first director have different elevations with respect to the surface of the substrate. The radiator and the first director define an antenna.

公开(公告)号：US11232993B2

公开(公告)日：2022-01-25

申请号：US16402127

申请日：2019-05-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin Shih ,  Chih Cheng Lee

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device package includes a dielectric layer, a package body and a protection structure. The dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The package body is disposed on the first surface of the dielectric layer. The package body covers a first portion of the lateral surface of the dielectric layer and exposes a second portion of the lateral surface of the dielectric layer. The protection structure is disposed on the second portion of the lateral surface of the dielectric layer.

公开(公告)号：US20190164871A1

公开(公告)日：2019-05-30

申请号：US15824913

申请日：2017-11-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih Cheng LEE ,  Yu-Lin Shih

IPC: H01L23/495 ,  H01L23/42 ,  H01L23/367 ,  H01L21/56 ,  H01L23/498

CPC classification number: H01L23/49568 ,  H01L21/568 ,  H01L23/3677 ,  H01L23/42 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/181

Abstract: A semiconductor substrate includes a dielectric layer, a heat dissipation structure and a first patterned conductive layer. The dielectric layer has a surface. The heat dissipation structure is surrounded by the dielectric layer. The heat dissipation structure defines a space and includes a liquid in the space. The first patterned conductive layer is disposed adjacent to the surface of the dielectric layer and thermally connected with the heat dissipation structure.

公开(公告)号：US11031274B2

公开(公告)日：2021-06-08

申请号：US16578062

申请日：2019-09-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin Shih ,  Chih-Cheng Lee

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L21/78 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor device package includes a carrier, a patterned passivation layer and a first patterned conductive layer. The patterned passivation layer is disposed on the carrier. The first patterned conductive layer is disposed on the carrier and surrounded by the patterned passivation layer. The first patterned conductive layer has a first portion and a second portion electrically disconnected from the first portion. The first portion has a first surface adjacent to the carrier and exposed by the patterned passivation layer. The second portion has a first surface adjacent to the carrier exposed by the patterned passivation layer. The first surface of the first portion is in direct contact with an insulation medium.

公开(公告)号：US10354969B2

公开(公告)日：2019-07-16

申请号：US15665289

申请日：2017-07-31

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin Shih ,  Chih-Cheng Lee

IPC: H01L21/48 ,  H01L23/00

Abstract: A substrate structure includes a dielectric layer, a first circuit layer, at least one conductive structure and a first protective layer. The first circuit layer is disposed adjacent to a first surface of the dielectric layer. The conductive structure includes a first portion and a second portion. The first portion is disposed on the first circuit layer. The first protective layer is disposed on the dielectric layer and contacts at least a portion of a sidewall of the first portion of the conductive structure. The first circuit layer and the conductive structure are integrally formed.

公开(公告)号：US10332757B2

公开(公告)日：2019-06-25

申请号：US15824919

申请日：2017-11-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin Shih ,  Chih Cheng Lee

IPC: H01L23/49 ,  H01L25/00 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor substrate includes a dielectric layer, a first patterned conductive layer and a first connection element. The dielectric layer has a first surface. The first patterned conductive layer has a first surface and is disposed adjacent to the first surface of the dielectric layer. The first connection element is disposed on the first surface of the first patterned conductive layer. The first connection element includes a first portion, a second portion and a seed layer disposed between the first portion and the second portion. The first portion of the first connection element and the first patterned conductive layer are formed to be a monolithic structure.

公开(公告)号：US09721799B2

公开(公告)日：2017-08-01

申请号：US14536253

申请日：2014-11-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin Shih ,  Chih-Cheng Lee

IPC: H01L21/288 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L21/683 ,  H01L21/56 ,  H01L21/768

CPC classification number: H01L21/288 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76805 ,  H01L21/76838 ,  H01L23/3128 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/83 ,  H01L2221/68345 ,  H01L2221/68372 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/32225 ,  H01L2224/838 ,  H01L2224/92144

Abstract: The present disclosure relates to a semiconductor package and method of making the same. The semiconductor package includes an encapsulation layer, a dielectric layer, a component, and a first patterned conductive layer. The encapsulation layer has a first surface. The component is within the encapsulation layer and has a front surface and a plurality of pads on the front surface. The dielectric layer is on the first surface of the encapsulation layer, and defines a plurality of via holes; wherein the plurality of pads of the component are against the dielectric layer; and wherein the dielectric layer has a second surface opposite the first surface of the encapsulation layer. Each of plurality of via holes extends from the second surface of the dielectric layer to a respective one of the plurality of the pads. The first patterned conductive layer is within the dielectric layer and surrounds the via holes.

公开(公告)号：US11515270B2

公开(公告)日：2022-11-29

申请号：US17067561

申请日：2020-10-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin Shih ,  Chih-Cheng Lee

IPC: H01L23/66 ,  H01L23/49 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/40 ,  H01L23/31

Abstract: An antenna package includes a conductive layer, an interconnection structure and an antenna. The interconnection structure is disposed on the conductive layer. The interconnection structure includes a conductive via and a first package body. The conductive via has a first surface facing the conductive layer, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The first package body covers the lateral surface of the conductive via and exposes the first surface and the second surface of the conductive via. The first package body is spaced apart from the conductive layer. The antenna is electrically connected to the second surface of the conductive via.

公开(公告)号：US11205628B2

公开(公告)日：2021-12-21

申请号：US16730390

申请日：2019-12-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Lin Shih ,  Chih-Cheng Lee

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/528

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a circuit structure. The circuit structure includes a dielectric layer and a bonding pad. The dielectric layer has a first dielectric surface and a second dielectric surface opposite to the first dielectric surface, where the dielectric layer defines a recess in the first dielectric surface, and the recess includes a sidewall. The bonding pad is disposed in the recess, where a first pad surface of the bonding pad is adjacent to the first dielectric surface, a second pad surface of the bonding pad is adjacent to the second dielectric surface, and an edge of the bonding pad is spaced from the sidewall of the recess by a first distance.

公开(公告)号：US10340212B2

公开(公告)日：2019-07-02

申请号：US15824913

申请日：2017-11-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih Cheng Lee ,  Yu-Lin Shih

IPC: H01L23/49 ,  H01L23/36 ,  H01L23/495 ,  H01L23/42 ,  H01L23/367 ,  H01L21/56 ,  H01L23/498

Abstract: A semiconductor substrate includes a dielectric layer, a heat dissipation structure and a first patterned conductive layer. The dielectric layer has a surface. The heat dissipation structure is surrounded by the dielectric layer. The heat dissipation structure defines a space and includes a liquid in the space. The first patterned conductive layer is disposed adjacent to the surface of the dielectric layer and thermally connected with the heat dissipation structure.