公开(公告)号：US20160070473A1

公开(公告)日：2016-03-10

申请号：US14479732

申请日：2014-09-08

Applicant: Apple Inc.

Inventor： Atai Levy ,  Yoav Kasorla ,  Stas Mouler ,  Alex Borisenkov ,  Dmitry Koyfman

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/061 ,  G06F3/0632 ,  G06F3/0659 ,  G06F3/0679 ,  G06F13/1689 ,  G11C11/5628 ,  G11C16/10

Abstract: An apparatus includes an interface and a processor. The interface is configured to communicate with a memory device. The processor is configured to send to the memory device, via the interface, a sequence of write commands that program multiple types of memory pages that incur respective different programming durations in the memory device, while inserting in the sequence suspension periods for permitting execution of storage commands that are not part of the sequence, such that at least some of the suspension periods are followed by write commands of types that do not have a shortest programming duration among the programming durations.

Abstract translation: 一种装置包括接口和处理器。 该接口被配置为与存储器设备通信。 处理器被配置为经由接口向存储器设备发送一系列写入命令，该命令编程在存储器设备中引起相应不同编程持续时间的多种类型的存储器页面，同时在序列中插入用于允许执行存储的暂停时段 不是序列的一部分的命令，使得至少一些暂停时间段之后是在编程持续时间中不具有最短编程持续时间的类型的写入命令。

公开(公告)号：US09043590B2

公开(公告)日：2015-05-26

申请号：US14055144

申请日：2013-10-16

Applicant: Apple Inc.

Inventor： Ori Isachar ,  Julian Vlaiko ,  Gil Semo ,  Atai Levy

IPC: G06F3/06 ,  G06F1/32

CPC classification number: G06F3/0659 ,  G06F1/3225 ,  G06F3/0604 ,  G06F3/0683

Abstract: A memory device includes a plurality of memory cells, a token input interface, a token output interface and control circuitry. The control circuitry is configured to accept a storage command, to condition execution of at least a part of the storage command on a presence of a token pulse on the token input interface, to execute the storage command, including the conditioned part, in the memory cells upon reception of the token pulse on the token input interface, and to reproduce the token pulse on the token output interface upon completion of the execution.

Abstract translation: 存储器件包括多个存储器单元，令牌输入接口，令牌输出接口和控制电路。 控制电路被配置为接受存储命令，以在令牌输入接口上存在令牌脉冲的情况下调节存储命令的至少一部分的执行，以在存储器中执行包括调节部分的存储命令 在令牌输入接口上接收到令牌脉冲，并且在完成执行时在令牌输出接口上再现令牌脉冲。

公开(公告)号：US20140047200A1

公开(公告)日：2014-02-13

申请号：US14055144

申请日：2013-10-16

Applicant: Apple Inc.

Inventor： Ori Isachar ,  Julian Vlaiko ,  Gil Semo ,  Atai Levy

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F1/3225 ,  G06F3/0604 ,  G06F3/0683

Abstract: A memory device includes a plurality of memory cells, a token input interface, a token output interface and control circuitry. The control circuitry is configured to accept a storage command, to condition execution of at least a part of the storage command on a presence of a token pulse on the token input interface, to execute the storage command, including the conditioned part, in the memory cells upon reception of the token pulse on the token input interface, and to reproduce the token pulse on the token output interface upon completion of the execution.

Abstract translation: 存储器件包括多个存储器单元，令牌输入接口，令牌输出接口和控制电路。 控制电路被配置为接受存储命令，以在令牌输入接口上存在令牌脉冲的情况下调节存储命令的至少一部分的执行，以在存储器中执行包括调节部分的存储命令 在令牌输入接口上接收到令牌脉冲，并且在完成执行时在令牌输出接口上再现令牌脉冲。

公开(公告)号：US09423961B2

公开(公告)日：2016-08-23

申请号：US14479732

申请日：2014-09-08

Applicant: Apple Inc.

Inventor： Atai Levy ,  Yoav Kasorla ,  Stas Mouler ,  Alex Borisenkov ,  Dmitry Koyfman

IPC: G06F3/00 ,  G06F3/06 ,  G06F13/16 ,  G11C11/56 ,  G11C16/10

CPC classification number: G06F3/0604 ,  G06F3/061 ,  G06F3/0632 ,  G06F3/0659 ,  G06F3/0679 ,  G06F13/1689 ,  G11C11/5628 ,  G11C16/10

Abstract: An apparatus includes an interface and a processor. The interface is configured to communicate with a memory device. The processor is configured to send to the memory device, via the interface, a sequence of write commands that program multiple types of memory pages that incur respective different programming durations in the memory device, while inserting in the sequence suspension periods for permitting execution of storage commands that are not part of the sequence, such that at least some of the suspension periods are followed by write commands of types that do not have a shortest programming duration among the programming durations.

Abstract translation: 一种装置包括接口和处理器。 该接口被配置为与存储器设备通信。 处理器被配置为经由接口向存储器设备发送一系列写入命令，该命令编程在存储器设备中引起相应不同编程持续时间的多种类型的存储器页面，同时在序列中插入用于允许执行存储的暂停时段 不是序列的一部分的命令，使得至少一些暂停时间段之后是在编程持续时间中不具有最短编程持续时间的类型的写入命令。