中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

13 records (took 0.013 seconds)

    Schemes for protecting data in NVM device using small storage footprint
    1.
    发明授权
    Schemes for protecting data in NVM device using small storage footprint 有权

    公开(公告)号：US10915394B1

    公开(公告)日：2021-02-09

    申请号：US16578353

    申请日：2019-09-22

    Applicant: Apple Inc.

    Inventor： Assaf Shappir ,  Stas Mouler

    IPC: G11C29/00 ,  G06F11/10 ,  G06F11/07 ,  G06F11/14 ,  H01L21/822 ,  G11C11/408 ,  G11C11/409 ,  G11C29/44

    Abstract: A memory system includes a Nonvolatile Memory (NVM) and storage circuitry. The NVM includes memory cells organized in multiple memory blocks that each includes multiple Word Lines (WLs). The storage circuitry assigns in a recovery scheme, data pages to predefined parity groups, including assigning to a parity group multiple data pages of two or more different bit-significance values in a common group of the memory cells in a WL. The storage circuitry calculates redundancy data over the data pages of a given parity group in accordance with the recovery scheme and stores the redundancy data in a dedicated group of the memory cells. The storage circuitry reads a data page belonging to the given parity group, and upon detecting a read failure, recovers the data page based on other data pages in the given parity group and on the redundancy data calculated for the given parity group.

    Recovering from failure in programming a nonvolatile memory
    2.
    发明授权
    Recovering from failure in programming a nonvolatile memory 有权

    公开(公告)号：US10762967B2

    公开(公告)日：2020-09-01

    申请号：US16202130

    申请日：2018-11-28

    Applicant: Apple Inc.

    Inventor： Assaf Shappir ,  Barak Baum ,  Itay Sagron ,  Roman Guy ,  Guy Ben-Yehuda ,  Stas Mouler

    IPC: G11C16/10 ,  G11C16/34 ,  G11C16/26 ,  G06F11/10 ,  G11C29/12

    Abstract: A controller includes an interface and a processor. The interface is configured to communicate with a nonvolatile memory including multiple memory cells organized in multiple memory blocks that each includes multiple Word Lines (WLs). The processor is configured to store first data in one or more WLs of a memory block, the first data occupies less than a maximal number of WLs available in the memory block, to calculate redundancy data over the first data and store the redundancy data in a dedicated memory, to program second data to a selected WL of the memory block that was not programmed with the first data, to check a programming status resulting from the programming of the selected WL, and in response to identifying that programming the second data to the selected WL has corrupted at least part of the first data, to recover the first data using the redundancy data.

    STATISTICAL PEAK-CURRENT MANAGEMENT IN NON-VOLATILE MEMORY DEVICES
    5.
    发明申请
    STATISTICAL PEAK-CURRENT MANAGEMENT IN NON-VOLATILE MEMORY DEVICES 有权
    非易失性存储器件中的统计峰值电流管理

    公开(公告)号：US20150199999A1

    公开(公告)日：2015-07-16

    申请号：US14468661

    申请日：2014-08-26

    Applicant: Apple Inc.

    Inventor： Naftali Sommer ,  Stas Mouler ,  Eyal Gurgi ,  Yoav Kasorla ,  Liran Erez

    IPC: G11C5/14

    CPC classification number: G11C5/14 ,  G11C5/145 ,  G11C5/147 ,  G11C16/10 ,  G11C16/12 ,  G11C16/30 ,  G11C16/32

    Abstract: A method includes, in a storage system that includes multiple memory devices, holding a definition of a given type of storage command. Multiple storage commands of the given type are executed in the memory devices, such that an actual current consumption of each storage command deviates from a nominal current waveform defined for the given type by no more than a predefined deviation, and such that each storage command is preceded by a random delay.

    Abstract translation: 一种方法包括在包括多个存储设备的存储系统中，保持给定类型的存储命令的定义。 给定类型的多个存储命令在存储器件中被执行，使得每个存储命令的实际电流消耗偏离为给定类型定义的额定电流波形不超过预定义的偏差，并且使得每个存储命令是 之前是随机延迟。

    Handling malfunction in a memory system comprising a nonvolatile memory by monitoring bad-block patterns
    6.
    发明授权
    Handling malfunction in a memory system comprising a nonvolatile memory by monitoring bad-block patterns 有权

    公开(公告)号：US10936456B1

    公开(公告)日：2021-03-02

    申请号：US16280090

    申请日：2019-02-20

    Applicant: Apple Inc.

    Inventor： Yael Shur ,  Assaf Shappir ,  Stas Mouler ,  Yoav Kasorla

    IPC: G06F11/00 ,  G06F11/20 ,  G06F11/14

    Abstract: A controller includes an interface and storage circuitry. The interface communicates with one or more memory devices, each of the memory devices includes multiple memory cells organized in memory blocks. The storage circuitry is configured to perform multiple storage operations to the memory cells in the one or more memory devices, and mark memory blocks in which one or more storage operations have failed as bad blocks. The controller is further configured to identify a pattern of multiple bad blocks occurring over a sequence of multiple consecutive storage operations, the pattern is indicative of a system-level malfunction in a memory system including the controller, and in response to identifying the pattern, to perform a corrective action to the memory system.

    Recovering from failure in programming a nonvolatile memory
    7.
    发明申请
    Recovering from failure in programming a nonvolatile memory 审中-公开

    公开(公告)号：US20200005874A1

    公开(公告)日：2020-01-02

    申请号：US16202130

    申请日：2018-11-28

    Applicant: Apple Inc.

    Inventor： Assaf Shappir ,  Barak Baum ,  Itay Sagron ,  Roman Guy ,  Guy Ben-Yehuda ,  Stas Mouler

    IPC: G11C16/10 ,  G11C16/34 ,  G11C16/26 ,  G11C29/12 ,  G06F11/10

    Abstract: A controller includes an interface and a processor. The interface is configured to communicate with a nonvolatile memory including multiple memory cells organized in multiple memory blocks that each includes multiple Word Lines (WLs). The processor is configured to store first data in one or more WLs of a memory block, the first data occupies less than a maximal number of WLs available in the memory block, to calculate redundancy data over the first data and store the redundancy data in a dedicated memory, to program second data to a selected WL of the memory block that was not programmed with the first data, to check a programming status resulting from the programming of the selected WL, and in response to identifying that programming the second data to the selected WL has corrupted at least part of the first data, to recover the first data using the redundancy data.

    Method to enhance programming performance in multilevel NVM devices
    8.
    发明授权
    Method to enhance programming performance in multilevel NVM devices 有权
    提高多级NVM设备编程性能的方法

    公开(公告)号：US09423961B2

    公开(公告)日：2016-08-23

    申请号：US14479732

    申请日：2014-09-08

    Applicant: Apple Inc.

    Inventor： Atai Levy ,  Yoav Kasorla ,  Stas Mouler ,  Alex Borisenkov ,  Dmitry Koyfman

    IPC: G06F3/00 ,  G06F3/06 ,  G06F13/16 ,  G11C11/56 ,  G11C16/10

    CPC classification number: G06F3/0604 ,  G06F3/061 ,  G06F3/0632 ,  G06F3/0659 ,  G06F3/0679 ,  G06F13/1689 ,  G11C11/5628 ,  G11C16/10

    Abstract: An apparatus includes an interface and a processor. The interface is configured to communicate with a memory device. The processor is configured to send to the memory device, via the interface, a sequence of write commands that program multiple types of memory pages that incur respective different programming durations in the memory device, while inserting in the sequence suspension periods for permitting execution of storage commands that are not part of the sequence, such that at least some of the suspension periods are followed by write commands of types that do not have a shortest programming duration among the programming durations.

    Abstract translation: 一种装置包括接口和处理器。 该接口被配置为与存储器设备通信。 处理器被配置为经由接口向存储器设备发送一系列写入命令，该命令编程在存储器设备中引起相应不同编程持续时间的多种类型的存储器页面，同时在序列中插入用于允许执行存储的暂停时段 不是序列的一部分的命令，使得至少一些暂停时间段之后是在编程持续时间中不具有最短编程持续时间的类型的写入命令。

    Techniques for utilizing volatile memory buffers to reduce parity information stored on a storage device
    9.
    发明授权
    Techniques for utilizing volatile memory buffers to reduce parity information stored on a storage device 有权

    公开(公告)号：US10977119B2

    公开(公告)日：2021-04-13

    申请号：US16382046

    申请日：2019-04-11

    Applicant: Apple Inc.

    Inventor： Eran Roll ,  Stas Mouler ,  Matthew J. Byom ,  Andrew W. Vogan ,  Muhammad N. Ashraf ,  Elad Harush ,  Roman Guy

    IPC: G06F11/00 ,  G06F11/10 ,  G11C29/52 ,  G11C29/04 ,  G11B20/18

    Abstract: Disclosed are techniques for managing parity information for data stored on a storage device. A method can be implemented at a computing device communicably coupled to the storage device, and include (1) receiving a request to write data into a data band of the storage device, (2) writing the data into stripes of the data band, comprising, for each stripe of the data band: (i) calculating first parity information for the data written into the stripe, (ii) writing the first parity information into a volatile memory, and (iii) in response to determining that a threshold number of stripes have been written: converting the first parity information into smaller second parity information, and (3) in response to determining that the data band is read-verified: (i) converting the second parity information into smaller third parity information, and (ii) storing the smaller third parity information into a parity band of the storage device.

Patent Agency Ranking