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公开(公告)号：US20230146592A1
公开(公告)日：2023-05-11
申请号：US17729626
申请日：2022-04-26
Inventor： Chandra B. PRAKASH , Tejasvi DAS , Cory J. PETERSON , Siddharth MARU
CPC classification number: H03F3/2173 , H03F3/213 , H03M1/12
Abstract: Circuitry for driving a load, the circuitry comprising: driver circuitry; and load sensing circuitry, wherein the circuitry is operable in: a driving mode of operation in which the driver circuitry supplies a drive signal to a load coupled to the circuitry; and a load sensing mode of operation, for estimating a characteristic of a load coupled to the circuitry based on a signal output by the load sensing circuitry in response to a stimulus signal, wherein the circuitry is configured to, in response to a request for operation of the circuitry in the load sensing mode: compare an indication of a current through the load to a predefined threshold; and if the indication of the current through the load meets the predefined threshold, prevent or delay operation in the load sensing mode.
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公开(公告)号：US20230147195A1
公开(公告)日：2023-05-11
申请号：US17751011
申请日：2022-05-23
Inventor： Charles W. ENO , Chandra B. PRAKASH
CPC classification number: H03F3/2173 , H03K7/08 , H03F3/45 , H03F3/213
Abstract: Integrated circuitry implementing amplifier circuitry, the integrated circuitry comprising first amplifier circuitry and second amplifier circuitry, the first and second amplifier circuitry being configurable as first and second single-ended amplifiers or as a differential amplifier, wherein the first amplifier circuitry comprises: a first input stage; a first half-bridge output stage having an output coupled to a first output terminal of the integrated circuitry; a first feedback path coupling a first input of the first input stage to a first sense terminal of the first amplifier circuitry; a second feedback path coupling a second input of the first input stage to a second sense terminal of the first amplifier circuitry; and a first shunt resistor coupling the output of the first half-bridge output stage to the first feedback path, wherein the second amplifier circuitry comprises: a second input stage; and a second half-bridge output stage having an output coupled to a second output terminal of the integrated circuitry, and wherein the first amplifier circuitry further comprises a second shunt resistor coupling the second feedback path to a dedicated shunt resistor terminal of the integrated circuitry, such that the second shunt resistor is directly accessible from outside the integrated circuitry.
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公开(公告)号：US20230141666A1
公开(公告)日：2023-05-11
申请号：US17545378
申请日：2021-12-08
Inventor： Chandra B. PRAKASH , Cory J. PETERSON
IPC: G11C7/10
CPC classification number: G11C7/1057 , H03K19/00361
Abstract: In accordance with embodiments of the present disclosure, a system may include a driver configured to drive a load with a single-ended driving signal and a signal return path for the load, wherein the signal return path comprises a voltage-mode driver configured to create a signal offset during an idle channel mode of the system in order to minimize idle channel noise at the load.
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Patent Agency Ranking
公开(公告)号：US20230031363A1
公开(公告)日：2023-02-02
申请号：US17573000
申请日：2022-01-11
Inventor： Saurabh SINGH , Chandra B. PRAKASH
Abstract: A method may include receiving, by a calibration circuit, an output of a subsystem comprising the sensor and the analog front end. The method may further include separating the output individually into the sensor offset and the amplifier offset by using inherent properties of separate frequency ranges for the sensor offset and the amplifier offset. The method may also include calibrating, by the calibration circuit, the sensor offset by determining a first calibration value for the sensor offset such that the output approximates zero during an idle-channel condition. The method may additionally include calibrating, by the calibration circuit, the amplifier offset by determining a second calibration value for the amplifier offset such that the output approximates zero during the idle-channel condition.
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公开(公告)号：US20230003779A1
公开(公告)日：2023-01-05
申请号：US17668445
申请日：2022-02-10
Inventor： Saurabh SINGH , Chandra B. PRAKASH , Eric KIMBALL , Cory J. PETERSON , Ryan LOBO
IPC: G01R27/08
Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.
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公开(公告)号：US20230178279A1
公开(公告)日：2023-06-08
申请号：US17540648
申请日：2021-12-02
Inventor： Chandra B. PRAKASH , Ramin ZANBAGHI
Abstract: A system may include an electromagnetic load, a driver configured to drive the electromagnetic load with a driving signal, and a processing system communicatively coupled to the electromagnetic load and configured to, during a haptic mode of the system couple a first terminal of the electromagnetic load to a ground voltage and cause the driving signal to have a first slew rate, and during a load sensing mode of the system for sensing a current associated with the electromagnetic load, couple the first terminal to a current-sensing circuit having a sense resistor coupled between the first terminal and an electrical node driven to a common-mode voltage and cause the driving signal to have a second slew rate lower than the first slew rate.
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公开(公告)号：US20230170854A1
公开(公告)日：2023-06-01
申请号：US17739480
申请日：2022-05-09
Inventor： Siddharth MARU , Chandra B. PRAKASH , Tejasvi DAS
CPC classification number: H03F3/04 , B06B1/0207 , H03F2200/129 , H03F2200/481
Abstract: An amplifier system may include a first feedback loop coupled between an output of an amplifier to an input of a modulator for regulating an output voltage driven at the output of the amplifier to a first terminal of a load of the amplifier system, a sense resistor for sensing a physical quantity associated with the amplifier, a second control loop coupled to the sense resistor such that the sense resistor is outside of the second control loop, the second control loop configured to regulate a common-mode voltage at a second terminal of the load, and a common-mode feedforward circuit coupled to the sense resistor and configured to minimize effects of a signal-dependent common-mode feedback of the sense resistor.
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公开(公告)号：US20230147461A1
公开(公告)日：2023-05-11
申请号：US17690402
申请日：2022-03-09
Inventor： Chandra B. PRAKASH , Tejasvi DAS , Siddharth MARU
Abstract: Circuitry for driving a load, the circuitry comprising: driver circuitry; load sensing circuitry; and a parameter estimation engine, wherein the circuitry is operable in: a driving mode of operation in which the driver circuitry supplies a drive signal to a load coupled to the circuitry; and a load sensing mode of operation, for estimating a characteristic of a load coupled to the circuitry based on a signal output by the load sensing circuitry in response to a stimulus signal supplied to the driver circuitry, and wherein the circuitry is operable to perform a calibration operation in which the parameter estimation engine generates a circuit parameter for use in the load sensing mode based, at least in part, on a signal generated by the circuitry in response to a calibration stimulus signal supplied to the driver circuitry.
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