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公开(公告)号：US6163845A
公开(公告)日：2000-12-19
申请号：US165781
申请日：1998-10-02
申请人： Dongfeng Zhao , F. Matthew Rhodes
发明人： Dongfeng Zhao , F. Matthew Rhodes
CPC分类号： G06F1/3287 , G06F1/3203 , G06F13/4081 , Y02D10/171
摘要： An apparatus and method for power management of embedded electronic subsystems. A power management control circuit for managing power to an embedded subsystem includes a subsystem power node connected to a first section of the embedded electronic subsystem and a bias voltage node connected to a second section of the embedded electronic subsystem. A power switch is connected between a power supply and the subsystem power node. By separating the power subsystem node from the bias voltage node, power can be removed from the subsystem, while still providing the necessary bias voltage to the electronic static discharge (ESD) diodes. This prevents the voltages applied to the system bus by the subsystem from causing bus contention or system bus lock-ups. A power removal and restoration procedure is also disclosed.
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公开(公告)号：US06427210B2
公开(公告)日：2002-07-30
申请号：US09734522
申请日：2000-12-11
申请人： Dongfeng Zhao , F. Matthew Rhodes
发明人： Dongfeng Zhao , F. Matthew Rhodes
IPC分类号： G06F126
CPC分类号： G06F1/3287 , G06F1/3203 , G06F13/4081 , Y02D10/171
摘要： An apparatus and method for power management of embedded electronic subsystems. A power management control circuit for managing power to an embedded subsystem includes a subsystem power node connected to a first section of the embedded electronic subsystem and a bias voltage node connected to a second section of the embedded electronic subsystem. A power switch is connected between a power supply and the subsystem power node. By separating the power subsystem node from the bias voltage node, power can be removed from the subsystem, while still providing the necessary bias voltage to the electronic static discharge (ESD) diodes. This prevents the voltages applied to the system bus by the subsystem from causing bus contention or system bus lock-ups. A power removal and restoration procedure is also disclosed.
摘要翻译： 嵌入式电子子系统电源管理的装置和方法。 用于管理嵌入式子系统的电力的功率管理控制电路包括连接到嵌入式电子子系统的第一部分的子系统功率节点和连接到嵌入式电子子系统的第二部分的偏置电压节点。 电源开关连接在电源和子系统电源节点之间。 通过将电源子系统节点与偏置电压节点分离，可以从子系统中去除功率，同时仍向电子静电放电（ESD）二极管提供必要的偏置电压。 这可以防止由子系统施加到系统总线的电压引起总线争用或系统总线锁定。 还公开了电力消除和恢复程序。
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3.发明授权Method and apparatus of frequency generation for use with digital cordless telephones 失效用于数字无绳电话的频率发生方法和装置
公开(公告)号：US5722040A
公开(公告)日：1998-02-24
申请号：US13625
申请日：1993-02-04
CPC分类号： H04B1/405 , H03J1/0008
摘要： Methods and apparatus for digital cordless telephone systems are preferably implemented in an integrated circuit chip set having one or more chips, adapted to receive a voice signal, for converting the voice signal into a digital signal of a desired form, for converting the digital signal into an analog signal and for modifying the frequency of the analog signal, for up converting during transmission the frequency of the analog signal from an intermediate frequency to a desired radio frequency and for down converting during reception from a selected radio frequency to the intermediate frequency and for amplifying the radio frequency signal during transmission and for switching the antenna between the transmit and receive paths. It is preferred for the chip set to include a base chip, an intermediate frequency chip, a radio frequency chip and an amplifier chip. It is preferred to also provide a synthesizer integrated circuit chip for generating carrier select signals to be used by the radio frequency chip in selecting desired carrier frequencies. The invention also includes a frequency translation scheme to be utilized in conjunction with the various chips. Utilization of this scheme serves to reduce spurious noise as well as to suppress transmit signals during receive operations. The invention also includes various sensors for adjusting the level of the signal to be transmitted and for adjusting the level of the signal received at the antenna.
摘要翻译： 用于数字无绳电话系统的方法和装置优选地在具有一个或多个芯片的集成电路芯片组中实现，该芯片组适于接收语音信号，用于将语音信号转换成所需形式的数字信号，以将数字信号转换成 模拟信号，用于修改模拟信号的频率，用于在将模拟信号的频率从中频到期望的射频传输期间进行上转换，并且用于在从选定的射频到中频的接收期间进行下变频， 在传输期间放大射频信号，并在发射和接收路径之间切换天线。 芯片组优选包括基片，中频芯片，射频芯片和放大器芯片。 优选地还提供一种用于产生载波选择信号的合成器集成电路芯片，以在射频芯片选择期望的载波频率时使用。 本发明还包括与各种芯片结合使用的频率转换方案。 该方案的利用有助于减少杂散噪声以及在接收操作期间抑制发射信号。 本发明还包括用于调整要发送的信号的电平并用于调整在天线处接收的信号的电平的各种传感器。
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4.发明授权Sample interpolator and method of generating additional samples of a sampled waveform using a programmable sample divider 失效样本内插器和使用可编程样本分割器生成采样波形的附加样本的方法
公开(公告)号：US5937010A
公开(公告)日：1999-08-10
申请号：US918941
申请日：1997-08-25
CPC分类号： H04L27/0008 , H04L25/03859
摘要： A programmable digital modulator and methods of modulating digital data for transmission by a communication system according to operating parameters selected for various applications are provided. A two-chip system is utilized by a preferred embodiment of the invention. One chip comprises a PROM for storing impulse response data which would result from filtering the data to be transmitted. The second chip comprises a data interface for accepting input data, an address generator for generating an address of the PROM where the impulse response data is stored which corresponds to the data input to the chip and for causing the PROM to output the impulse response data stored at the address generated, and a data modulator for modulating a carrier signal with the impulse response data provided by the PROM. To account for intersymbol interference which occurs in some types of digital communications, an accumulator is further provided by the second chip for summing impulse response data associated with more than one input where the impulse response data overlap in time. An interpolator is also provided by the second chip to generate additional data samples to be used to modulate the carrier signal enabling a greater output sample rate. A data scrambler is also provided to scramble either binary data or data symbols according to the particular mode of communication selected.
摘要翻译： 提供了一种可编程数字调制器和调制数字数据以便根据为各种应用选择的操作参数由通信系统传输的方法。 本发明的优选实施例利用双芯片系统。 一个芯片包括一个PROM，用于存储由滤波要发送的数据产生的脉冲响应数据。 第二芯片包括用于接收输入数据的数据接口，地址发生器，用于产生存储脉冲响应数据的PROM的地址，该地址对应于输入到芯片的数据，并使PROM输出存储的脉冲响应数据 以及用PROM提供的脉冲响应数据调制载波信号的数据调制器。 为了解决在某些类型的数字通信中发生的符号间干扰，由第二芯片进一步提供一个累加器，用于对与脉冲响应数据在时间上重叠的多于一个输入相关联的脉冲响应数据求和。 内插器也由第二芯片提供以产生附加的数据采样，以用于调制载波信号，从而能够获得更大的输出采样率。 还提供数据扰频器以根据所选择的特定通信模式来对二进制数据或数据符号进行加扰。
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公开(公告)号：US5600678A
公开(公告)日：1997-02-04
申请号：US330577
申请日：1994-10-27
CPC分类号： H04L27/0008 , H04L25/03859
摘要： A programmable digital modulator and methods of modulating digital data for transmission by a communication system according to operating parameters selected for various applications are provided. A two-chip system is utilized by a preferred embodiment of the invention. One chip comprises a PROM for storing impulse response data which would result from filtering the data to be transmitted. The second chip comprises a data interface for accepting input data, an address generator for generating an address of the PROM where the impulse response data is stored which corresponds to the data input to the chip and for causing the PROM to output the impulse response data stored at the address generated, and a data modulator for modulating a carrier signal with the impulse response data provided by the PROM. To account for intersymbol interference which occurs in some types of digital communications, an accumulator is further provided by the second chip for summing impulse response data associated with more than one input where the impulse response data overlap in time. An interpolator is also provided by the second chip to generate additional data samples to be used to modulate the carrier signal enabling a greater output sample rate. A data scrambler is also provided to scramble either binary data or data symbols according to the particular mode of communication selected.
摘要翻译： 提供了一种可编程数字调制器和调制数字数据以便根据为各种应用选择的操作参数由通信系统传输的方法。 本发明的优选实施例利用双芯片系统。 一个芯片包括一个PROM，用于存储由滤波要发送的数据产生的脉冲响应数据。 第二芯片包括用于接收输入数据的数据接口，地址发生器，用于产生存储脉冲响应数据的PROM的地址，该地址对应于输入到芯片的数据，并使PROM输出存储的脉冲响应数据 以及用PROM提供的脉冲响应数据调制载波信号的数据调制器。 为了解决在某些类型的数字通信中发生的符号间干扰，由第二芯片进一步提供一个累加器，用于对与脉冲响应数据在时间上重叠的多于一个输入相关联的脉冲响应数据求和。 内插器也由第二芯片提供以产生附加的数据采样，以用于调制载波信号，从而能够获得更大的输出采样率。 还提供数据扰频器以根据所选择的特定通信模式来对二进制数据或数据符号进行加扰。
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公开(公告)号：US5420887A
公开(公告)日：1995-05-30
申请号：US858397
申请日：1992-03-26
CPC分类号： H04L27/0008 , H04L25/03859
摘要： A programmable digital modulator and methods of modulating digital data for transmission by a communication system according to operating parameters selected for various applications are provided. A two-chip system is utilized by a preferred embodiment of the invention. One chip comprises a PROM for storing impulse response data which would result from filtering the data to be transmitted. The second chip comprises a data interface for accepting input data, an address generator for generating an address of the PROM where the impulse response data is stored which corresponds to the data input to the chip and for causing the PROM to output the impulse response data stored at the address generated, and a data modulator for modulating a carrier signal with the impulse response data provided by the PROM. To account for intersymbol interference which occurs in some types of digital communications, an accumulator is further provided by the second chip for summing impulse response data associated with more than one input where the impulse response data overlap in time. An interpolator is also provided by the second chip to generate additional data samples to be used to modulate the carrier signal enabling a greater output sample rate. A data scrambler is also provided to scramble either binary data or data symbols according to the particular mode of communication selected.
摘要翻译： 提供了一种可编程数字调制器和调制数字数据以便根据为各种应用选择的操作参数由通信系统传输的方法。 本发明的优选实施例利用双芯片系统。 一个芯片包括一个PROM，用于存储由滤波要发送的数据产生的脉冲响应数据。 第二芯片包括用于接收输入数据的数据接口，地址发生器，用于产生存储脉冲响应数据的PROM的地址，该地址对应于输入到芯片的数据，并使PROM输出存储的脉冲响应数据 以及用PROM提供的脉冲响应数据调制载波信号的数据调制器。 为了解决在某些类型的数字通信中发生的符号间干扰，由第二芯片进一步提供一个累加器，用于对与脉冲响应数据在时间上重叠的多于一个输入相关联的脉冲响应数据求和。 内插器也由第二芯片提供以产生附加的数据采样，以用于调制载波信号，从而能够获得更大的输出采样率。 还提供数据扰频器以根据所选择的特定通信模式来对二进制数据或数据符号进行加扰。
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公开(公告)号：US4937475A
公开(公告)日：1990-06-26
申请号：US246311
申请日：1988-09-19
申请人： F. Matthew Rhodes , Jack I. Raffel
发明人： F. Matthew Rhodes , Jack I. Raffel
IPC分类号： H03K19/173 , H03K19/177 , H04Q3/52
CPC分类号： H03K19/17748 , H03K19/1736 , H03K19/17704 , H03K19/17728 , H03K19/1778 , H04Q3/523
摘要： A laser programmable integrated circuit chip has a plurality of logic modules organized as rows and columns. The modules and other chip components are connected by a grid-like array of conductors. The conductors are initially unattached. Customization occurs by fusing laser diffuseable links and severing cut points on the conductors. The modules have continuous conductor lines running through them. These conductor lines aid in testing and are useful in routing and error avoidance. The chip also contains test registers to test the array of logic modules, the input/output blocks, and the conductors.
摘要翻译： 激光可编程集成电路芯片具有被组织成行和列的多个逻辑模块。 模块和其他芯片组件通过栅格阵列的导体连接。 导体最初未连接。 通过熔合激光可漫射连接并切断导体上的切割点进行定制。 模块具有连续的导线穿过它们。 这些导线有助于测试，并且有助于路由和错误避免。 该芯片还包含用于测试逻辑模块阵列，输入/输出块和导体的测试寄存器。
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8.发明授权Frequency re-used and time-shared cellular communication system having multiple radio communication systems 失效具有多个无线电通信系统的频率再次使用和时间共享的蜂窝通信系统
公开(公告)号：US5999818A
公开(公告)日：1999-12-07
申请号：US692678
申请日：1996-08-06
IPC分类号： H04W4/06 , H04W16/00 , H04W16/14 , H04W52/02 , H04W72/04 , H04W74/04 , H04W84/04 , H04W88/10 , H04J3/16
CPC分类号： H04W28/16 , H04W16/00 , H04W16/14 , H04W4/06 , H04W52/0206 , H04W74/04 , H04W84/042 , H04W88/10
摘要： A method and apparatus for multiplexing time-shared base stations between a plurality of radio communication systems in a cellular communication system. Each radio communication system in the cellular system is assigned a limited unique set of frequencies for communication therein. Base stations in the cellular system are synchronized to a common time base and frequency reuse is achieved by time-sharing the frequencies via allocated time slots. Base stations activated to communicate in a first radio communication system and using the same frequencies that may interfere with each other are activated in the first system only during selected time intervals while same-frequency base stations nearby are deactivated in the first system. The deactivated base stations are then in turn activated in the first system while previously activated same-frequency base stations nearby are deactivated. Enhanced base station efficiency is achieved using the present inventive method by activating the time sharing base stations to communicate in one or more additional radio communication systems during periods when the base stations are deactivated in the first system. The radio communication systems can use differing numbers of assigned frequencies having differing time slot durations. The transmission periods used by each system may be mutually exclusive, or may overlap.
摘要翻译： 一种用于在蜂窝通信系统中的多个无线电通信系统之间复用时间共享基站的方法和装置。 蜂窝系统中的每个无线电通信系统被分配有限的唯一的一组频率用于在其中进行通信。 蜂窝系统中的基站被同步到公共时基，并且通过经由分配的时隙对频率进行时分，来实现频率重用。 激活在第一无线电通信系统中通信并且使用可能彼此干扰的相同频率的基站仅在选定的时间间隔期间在第一系统中被激活，而在第一系统中的相邻频率基站被去激活。 然后在第一系统中激活停用的基站，同时先前激活的邻近的同频基站被去激活。 在基站在第一系统中被停用的时段期间，通过激活时间共享基站在一个或多个附加的无线电通信系统中通信来实现增强的基站效率。 无线电通信系统可以使用具有不同时隙持续时间的不同数量的分配频率。 每个系统使用的传输周期可以是互斥的，或者可以重叠。
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