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公开(公告)号:US09627377B2
公开(公告)日:2017-04-18
申请号:US14538401
申请日:2014-11-11
Applicant: GLOBALFOUNDRIES INC.
Inventor: Marc Adam Bergendahl , Kangguo Cheng , David Vaclav Horak , Ali Khakifirooz , Shom Ponoth , Theodorus Eduardus Standaert , Chih-Chao Yang , Charles William Koburger, III , Xiuyu Cai , Ruilong Xie
IPC: H01L27/08 , H01L27/088 , H01L29/78 , H01L29/06 , H01L29/66
CPC classification number: H01L27/0886 , H01L29/0649 , H01L29/6681 , H01L29/7855
Abstract: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.
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2.
公开(公告)号:US20150061040A1
公开(公告)日:2015-03-05
申请号:US14538401
申请日:2014-11-11
Inventor: Marc Adam Bergendahl , Kangguo Cheng , David Vaclav Horak , Ali Khakifirooz , Shom Ponoth , Theodorus Eduardus Standaert , Chih-Chao Yang , Charles William Koburger, III , Xiuyu Cai , Ruilong Xie
IPC: H01L27/088 , H01L29/06
CPC classification number: H01L27/0886 , H01L29/0649 , H01L29/6681 , H01L29/7855
Abstract: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.
Abstract translation: 本发明的实施例提供一种形成半导体结构的方法。 该方法包括在衬底的顶部上形成一组器件特征; 在所述组装置特征的顶部直接形成第一介电层,并在所述基板的顶部上形成第一电介质层,从而产生从所述基板的顶表面测量的所述第一电介质层的高度分布,所述高度分布与所述基板的图案相关联 完全围绕设备特征的绝缘结构; 以及在由所述图案限定的区域中形成第二电介质层以形成所述绝缘结构。 还公开了通过该方法形成的结构。
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3.
公开(公告)号:US20140191296A1
公开(公告)日:2014-07-10
申请号:US13735315
申请日:2013-01-07
Inventor: Marc Adam Bergendahl , Kangguo Cheng , David Vaclav Horak , Ali Khakifirooz , Shom Ponoth , Theodorus Eduardus Standaert , Chih-Chao Yang , Charles William Koburger, III , Xiuyu Cai , Ruilong Xie
CPC classification number: H01L27/0886 , H01L29/0649 , H01L29/6681 , H01L29/7855
Abstract: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.
Abstract translation: 本发明的实施例提供一种形成半导体结构的方法。 该方法包括在衬底的顶部上形成一组器件特征; 在所述一组装置特征的顶部直接形成第一介电层,并且在所述基板的顶部上形成第一电介质层,从而产生从所述基板的顶表面测量的所述第一介电层的高度分布,所述高度分布与所述基板的图案相关联 完全围绕设备特征的绝缘结构; 以及在由所述图案限定的区域中形成第二电介质层以形成所述绝缘结构。 还公开了通过该方法形成的结构。
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公开(公告)号:US08941156B2
公开(公告)日:2015-01-27
申请号:US13735315
申请日:2013-01-07
Inventor: Marc Adam Bergendahl , Kangguo Cheng , David Vaclav Horak , Ali Khakifirooz , Shom Ponoth , Theodorus Eduardus Standaert , Chih-Chao Yang , Charles William Koburger, III , Xiuyu Cai , Ruilong Xie
IPC: H01L29/78
CPC classification number: H01L27/0886 , H01L29/0649 , H01L29/6681 , H01L29/7855
Abstract: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.
Abstract translation: 本发明的实施例提供一种形成半导体结构的方法。 该方法包括在衬底的顶部上形成一组器件特征; 在所述组装置特征的顶部直接形成第一介电层,并在所述基板的顶部上形成第一电介质层,从而产生从所述基板的顶表面测量的所述第一电介质层的高度分布,所述高度分布与所述基板的图案相关联 完全围绕设备特征的绝缘结构; 以及在由所述图案限定的区域中形成第二电介质层以形成所述绝缘结构。 还公开了通过该方法形成的结构。
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