SELF-ALIGNED DIELECTRIC ISOLATION FOR FINFET DEVICES
    1.
    发明申请
    SELF-ALIGNED DIELECTRIC ISOLATION FOR FINFET DEVICES 有权
    用于FINFET器件的自对准介电隔离

    公开(公告)号:US20150061040A1

    公开(公告)日:2015-03-05

    申请号:US14538401

    申请日:2014-11-11

    IPC分类号: H01L27/088 H01L29/06

    摘要: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.

    摘要翻译: 本发明的实施例提供一种形成半导体结构的方法。 该方法包括在衬底的顶部上形成一组器件特征; 在所述组装置特征的顶部直接形成第一介电层,并在所述基板的顶部上形成第一电介质层,从而产生从所述基板的顶表面测量的所述第一电介质层的高度分布,所述高度分布与所述基板的图案相关联 完全围绕设备特征的绝缘结构; 以及在由所述图案限定的区域中形成第二电介质层以形成所述绝缘结构。 还公开了通过该方法形成的结构。

    Self-aligned dielectric isolation for FinFET devices
    2.
    发明授权
    Self-aligned dielectric isolation for FinFET devices 有权
    FinFET器件的自对准介质隔离

    公开(公告)号:US08941156B2

    公开(公告)日:2015-01-27

    申请号:US13735315

    申请日:2013-01-07

    IPC分类号: H01L29/78

    摘要: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.

    摘要翻译: 本发明的实施例提供一种形成半导体结构的方法。 该方法包括在衬底的顶部上形成一组器件特征; 在所述组装置特征的顶部直接形成第一介电层,并在所述基板的顶部上形成第一电介质层,从而产生从所述基板的顶表面测量的所述第一电介质层的高度分布,所述高度分布与所述基板的图案相关联 完全围绕设备特征的绝缘结构; 以及在由所述图案限定的区域中形成第二电介质层以形成所述绝缘结构。 还公开了通过该方法形成的结构。

    SELF-ALIGNED DIELECTRIC ISOLATION FOR FINFET DEVICES
    3.
    发明申请
    SELF-ALIGNED DIELECTRIC ISOLATION FOR FINFET DEVICES 有权
    用于FINFET器件的自对准介电隔离

    公开(公告)号:US20140191296A1

    公开(公告)日:2014-07-10

    申请号:US13735315

    申请日:2013-01-07

    IPC分类号: H01L29/78 H01L29/66

    摘要: Embodiments of the present invention provide a method of forming semiconductor structure. The method includes forming a set of device features on top of a substrate; forming a first dielectric layer directly on top of the set of device features and on top of the substrate, thereby creating a height profile of the first dielectric layer measured from a top surface of the substrate, the height profile being associated with a pattern of an insulating structure that fully surrounds the set of device features; and forming a second dielectric layer in areas that are defined by the pattern to create the insulating structure. A structure formed by the method is also disclosed.

    摘要翻译: 本发明的实施例提供一种形成半导体结构的方法。 该方法包括在衬底的顶部上形成一组器件特征; 在所述一组装置特征的顶部直接形成第一介电层,并且在所述基板的顶部上形成第一电介质层,从而产生从所述基板的顶表面测量的所述第一介电层的高度分布,所述高度分布与所述基板的图案相关联 完全围绕设备特征的绝缘结构; 以及在由所述图案限定的区域中形成第二电介质层以形成所述绝缘结构。 还公开了通过该方法形成的结构。

    METHOD OF FORMING FINFET OF VARIABLE CHANNEL WIDTH
    4.
    发明申请
    METHOD OF FORMING FINFET OF VARIABLE CHANNEL WIDTH 有权
    形成可变通道宽度FINFET的方法

    公开(公告)号:US20140191323A1

    公开(公告)日:2014-07-10

    申请号:US13736111

    申请日:2013-01-08

    IPC分类号: H01L27/088 H01L29/66

    摘要: Embodiments of present invention provide a method of forming a first and a second group of fins on a substrate; covering a top first portion of the first and second groups of fins with a first dielectric material; covering a bottom second portion of the first and second groups of fins with a second dielectric material, the bottom second portion of the first group and the second group of fins having a same height; exposing a middle third portion of the first and second groups of fins to an oxidizing environment to create an oxide section that separates the top first portion from the bottom second portion of the first and second groups of fins; and forming one or more fin-type field-effect-transistors (FinFETs) using the top first portion of the first and second groups of fins as fins under gates of the one or more FinFETs.

    摘要翻译: 本发明的实施例提供一种在基板上形成第一组翅片和第二组翅片的方法; 用第一介电材料覆盖第一和第二组翅片的顶部第一部分; 用第二电介质材料覆盖第一和第二组翅片的底部第二部分,第一组的底部第二部分和具有相同高度的第二组翅片; 将第一组翅片和第二组翅片的中间第三部分暴露于氧化环境以产生将顶部第一部分与第一组翅片和第二组鳍片的底部第二部分分离的氧化物部分; 以及使用所述第一和第二组翅片的顶部第一部分在所述一个或多个FinFET的栅极下形成翅片形成一个或多个鳍状场效应晶体管(FinFET)。

    Method of forming finFET of variable channel width
    5.
    发明授权
    Method of forming finFET of variable channel width 有权
    形成可变通道宽度的finFET的方法

    公开(公告)号:US08896067B2

    公开(公告)日:2014-11-25

    申请号:US13736111

    申请日:2013-01-08

    摘要: Embodiments of present invention provide a method of forming a first and a second group of fins on a substrate; covering a top first portion of the first and second groups of fins with a first dielectric material; covering a bottom second portion of the first and second groups of fins with a second dielectric material, the bottom second portion of the first group and the second group of fins having a same height; exposing a middle third portion of the first and second groups of fins to an oxidizing environment to create an oxide section that separates the top first portion from the bottom second portion of the first and second groups of fins; and forming one or more fin-type field-effect-transistors (FinFETs) using the top first portion of the first and second groups of fins as fins under gates of the one or more FinFETs.

    摘要翻译: 本发明的实施例提供一种在基板上形成第一组翅片和第二组翅片的方法; 用第一介电材料覆盖第一和第二组翅片的顶部第一部分; 用第二电介质材料覆盖第一和第二组翅片的底部第二部分,第一组的底部第二部分和具有相同高度的第二组翅片; 将第一组翅片和第二组翅片的中间第三部分暴露于氧化环境以产生将顶部第一部分与第一组翅片和第二组鳍片的底部第二部分分离的氧化物部分; 以及使用所述第一和第二组翅片的顶部第一部分在所述一个或多个FinFET的栅极下形成翅片形成一个或多个鳍状场效应晶体管(FinFET)。